1 /* $OpenBSD: sis85c503reg.h,v 1.3 2000/03/28 03:38:00 mickey Exp $ */
2 /* $NetBSD: sis85c503reg.h,v 1.1 1999/11/17 01:21:21 thorpej Exp $ */
3
4 /*
5 * Copyright (c) 1999, by UCHIYAMA Yasushi
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. The name of the developer may NOT be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * Register definitions for the SiS 85c503 PCI-ISA bridge interrupt controller.
31 */
32
33 #define SIS85C503_CFG_PIRQ_REGSTART 0x41 /* PCI configuration space */
34 #define SIS85C503_CFG_PIRQ_REGEND 0x44
35
36 #define SIS85C503_LEGAL_LINK(link) ((link) >= SIS85C503_CFG_PIRQ_REGSTART && \
37 (link) <= SIS85C503_CFG_PIRQ_REGEND)
38
39 #define SIS85C503_CFG_PIRQ_REGOFS(regofs) (((regofs) >> 2) << 2)
40 #define SIS85C503_CFG_PIRQ_SHIFT(regofs) \
41 (((regofs) - SIS85C503_CFG_PIRQ_REGOFS(regofs)) << 3)
42
43 #define SIS85C503_CFG_PIRQ_MASK 0xff
44 #define SIS85C503_CFG_PIRQ_INTR_MASK 0x0f
45
46 #define SIS85C503_CFG_PIRQ_REG(reg, regofs) \
47 (((reg) >> SIS85C503_CFG_PIRQ_SHIFT(regofs)) & SIS85C503_CFG_PIRQ_MASK)
48
49 #define SIS85C503_CFG_PIRQ_ROUTE_DISABLE 0x80
50
51 #define SIS85C503_PIRQ_MASK 0xdef8
52 #define SIS85C503_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \
53 ((1 << (irq)) & SIS85C503_PIRQ_MASK) != 0)