root/dev/pci/esareg.h

INCLUDED FROM

    1 /* $OpenBSD: esareg.h,v 1.1 2002/04/08 01:47:33 frantzen Exp $ */
    2 /* $NetBSD: esareg.h,v 1.8 2002/03/06 18:30:31 jmcneill Exp $ */
    4 /*
    5  * Copyright (c) 2002 Lennart Augustsson
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. The name of the author may not be used to endorse or promote products
   14  *    derived from this software without specific prior written permission.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   29 /*
   30  * ESS Allegro-1 / Maestro3 Audio Driver
   31  * 
   32  * Lots of magic based on the FreeBSD maestro3 driver and
   33  * reverse engineering.
   34  * Original driver by Don Kim.
   35  *
   36  */
   38 /* Allegro PCI configuration registers */
   39 #define PCI_LEGACY_AUDIO_CTRL   0x40
   40 #define DISABLE_LEGACY          0x00008000
   42 #define ESA_PCI_ALLEGRO_CONFIG      0x50
   43 #define ESA_SB_ADDR_240             0x00000004
   44 #define ESA_MPU_ADDR_MASK           0x00000018
   45 #define ESA_MPU_ADDR_330            0x00000000
   46 #define ESA_MPU_ADDR_300            0x00000008
   47 #define ESA_MPU_ADDR_320            0x00000010
   48 #define ESA_MPU_ADDR_340            0x00000018
   49 #define ESA_USE_PCI_TIMING          0x00000040
   50 #define ESA_POSTED_WRITE_ENABLE     0x00000080
   51 #define ESA_DMA_POLICY_MASK         0x00000700
   52 #define ESA_DMA_DDMA                0x00000000
   53 #define ESA_DMA_TDMA                0x00000100
   54 #define ESA_DMA_PCPCI               0x00000200
   55 #define ESA_DMA_WBDMA16             0x00000400
   56 #define ESA_DMA_WBDMA4              0x00000500
   57 #define ESA_DMA_WBDMA2              0x00000600
   58 #define ESA_DMA_WBDMA1              0x00000700
   59 #define ESA_DMA_SAFE_GUARD          0x00000800
   60 #define ESA_HI_PERF_GP_ENABLE       0x00001000
   61 #define ESA_PIC_SNOOP_MODE_0        0x00002000
   62 #define ESA_PIC_SNOOP_MODE_1        0x00004000
   63 #define ESA_SOUNDBLASTER_IRQ_MASK   0x00008000
   64 #define ESA_RING_IN_ENABLE          0x00010000
   65 #define ESA_SPDIF_TEST_MODE         0x00020000
   66 #define ESA_CLK_MULT_MODE_SELECT_2  0x00040000
   67 #define ESA_EEPROM_WRITE_ENABLE     0x00080000
   68 #define ESA_CODEC_DIR_IN            0x00100000
   69 #define ESA_HV_BUTTON_FROM_GD       0x00200000
   70 #define ESA_REDUCED_DEBOUNCE        0x00400000
   71 #define ESA_HV_CTRL_ENABLE          0x00800000
   72 #define ESA_SPDIF_ENABLE            0x01000000
   73 #define ESA_CLK_DIV_SELECT          0x06000000
   74 #define ESA_CLK_DIV_BY_48           0x00000000
   75 #define ESA_CLK_DIV_BY_49           0x02000000
   76 #define ESA_CLK_DIV_BY_50           0x04000000
   77 #define ESA_CLK_DIV_RESERVED        0x06000000
   78 #define ESA_PM_CTRL_ENABLE          0x08000000
   79 #define ESA_CLK_MULT_MODE_SELECT    0x30000000
   80 #define ESA_CLK_MULT_MODE_SHIFT     28
   81 #define ESA_CLK_MULT_MODE_0         0x00000000
   82 #define ESA_CLK_MULT_MODE_1         0x10000000
   83 #define ESA_CLK_MULT_MODE_2         0x20000000
   84 #define ESA_CLK_MULT_MODE_3         0x30000000
   85 #define ESA_INT_CLK_SELECT          0x40000000
   86 #define ESA_INT_CLK_MULT_RESET      0x80000000
   88 /* M3 */
   89 #define ESA_INT_CLK_SRC_NOT_PCI     0x00100000
   90 #define ESA_INT_CLK_MULT_ENABLE     0x80000000
   92 #define ESA_PCI_ACPI_CONTROL        0x54
   93 #define ESA_PCI_ACPI_D0             0x00000000
   94 #define ESA_PCI_ACPI_D1             0xB4F70000
   95 #define ESA_PCI_ACPI_D2             0xB4F7B4F7
   97 #define ESA_PCI_USER_CONFIG         0x58
   98 #define ESA_EXT_PCI_MASTER_ENABLE   0x00000001
   99 #define ESA_SPDIF_OUT_SELECT        0x00000002
  100 #define ESA_TEST_PIN_DIR_CTRL       0x00000004
  101 #define ESA_AC97_CODEC_TEST         0x00000020
  102 #define ESA_TRI_STATE_BUFFER        0x00000080
  103 #define ESA_IN_CLK_12MHZ_SELECT     0x00000100
  104 #define ESA_MULTI_FUNC_DISABLE      0x00000200
  105 #define ESA_EXT_MASTER_PAIR_SEL     0x00000400
  106 #define ESA_PCI_MASTER_SUPPORT      0x00000800
  107 #define ESA_STOP_CLOCK_ENABLE       0x00001000
  108 #define ESA_EAPD_DRIVE_ENABLE       0x00002000
  109 #define ESA_REQ_TRI_STATE_ENABLE    0x00004000
  110 #define ESA_REQ_LOW_ENABLE          0x00008000
  111 #define ESA_MIDI_1_ENABLE           0x00010000
  112 #define ESA_MIDI_2_ENABLE           0x00020000
  113 #define ESA_SB_AUDIO_SYNC           0x00040000
  114 #define ESA_HV_CTRL_TEST            0x00100000
  115 #define ESA_SOUNDBLASTER_TEST       0x00400000
  117 #define ESA_PCI_USER_CONFIG_C       0x5C
  119 #define ESA_PCI_DDMA_CTRL           0x60
  120 #define ESA_DDMA_ENABLE             0x00000001
  123 /* Allegro registers */
  124 #define ESA_HOST_INT_CTRL           0x18
  125 #define ESA_SB_INT_ENABLE           0x0001
  126 #define ESA_MPU401_INT_ENABLE       0x0002
  127 #define ESA_ASSP_INT_ENABLE         0x0010
  128 #define ESA_RING_INT_ENABLE         0x0020
  129 #define ESA_HV_INT_ENABLE           0x0040
  130 #define ESA_CLKRUN_GEN_ENABLE       0x0100
  131 #define ESA_HV_CTRL_TO_PME          0x0400
  132 #define ESA_SOFTWARE_RESET_ENABLE   0x8000
  134 /*
  135  * should be using the above defines, probably.
  136  */
  137 #define ESA_REGB_ENABLE_RESET       0x01
  138 #define ESA_REGB_STOP_CLOCK         0x10
  140 #define ESA_HOST_INT_STATUS         0x1A
  141 #define ESA_SB_INT_PENDING          0x01
  142 #define ESA_MPU401_INT_PENDING      0x02
  143 #define ESA_ASSP_INT_PENDING        0x10
  144 #define ESA_RING_INT_PENDING        0x20
  145 #define ESA_HV_INT_PENDING          0x40
  147 #define ESA_HARDWARE_VOL_CTRL       0x1B
  148 #define ESA_SHADOW_MIX_REG_VOICE    0x1C
  149 #define ESA_HW_VOL_COUNTER_VOICE    0x1D
  150 #define ESA_SHADOW_MIX_REG_MASTER   0x1E
  151 #define ESA_HW_VOL_COUNTER_MASTER   0x1F
  153 #define ESA_CODEC_COMMAND           0x30
  154 #define ESA_CODEC_READ_B            0x80
  156 #define ESA_CODEC_STATUS            0x30
  157 #define ESA_CODEC_BUSY_B            0x01
  159 #define ESA_CODEC_DATA              0x32
  161 #define ESA_RING_BUS_CTRL_A         0x36
  162 #define ESA_RAC_PME_ENABLE          0x0100
  163 #define ESA_RAC_SDFS_ENABLE         0x0200
  164 #define ESA_LAC_PME_ENABLE          0x0400
  165 #define ESA_LAC_SDFS_ENABLE         0x0800
  166 #define ESA_SERIAL_AC_LINK_ENABLE   0x1000
  167 #define ESA_IO_SRAM_ENABLE          0x2000
  168 #define ESA_IIS_INPUT_ENABLE        0x8000
  170 #define ESA_RING_BUS_CTRL_B         0x38
  171 #define ESA_SECOND_CODEC_ID_MASK    0x0003
  172 #define ESA_SPDIF_FUNC_ENABLE       0x0010
  173 #define ESA_SECOND_AC_ENABLE        0x0020
  174 #define ESA_SB_MODULE_INTF_ENABLE   0x0040
  175 #define ESA_SSPE_ENABLE             0x0040
  176 #define ESA_M3I_DOCK_ENABLE         0x0080
  178 #define ESA_SDO_OUT_DEST_CTRL       0x3A
  179 #define ESA_COMMAND_ADDR_OUT        0x0003
  180 #define ESA_PCM_LR_OUT_LOCAL        0x0000
  181 #define ESA_PCM_LR_OUT_REMOTE       0x0004
  182 #define ESA_PCM_LR_OUT_MUTE         0x0008
  183 #define ESA_PCM_LR_OUT_BOTH         0x000C
  184 #define ESA_LINE1_DAC_OUT_LOCAL     0x0000
  185 #define ESA_LINE1_DAC_OUT_REMOTE    0x0010
  186 #define ESA_LINE1_DAC_OUT_MUTE      0x0020
  187 #define ESA_LINE1_DAC_OUT_BOTH      0x0030
  188 #define ESA_PCM_CLS_OUT_LOCAL       0x0000
  189 #define ESA_PCM_CLS_OUT_REMOTE      0x0040
  190 #define ESA_PCM_CLS_OUT_MUTE        0x0080
  191 #define ESA_PCM_CLS_OUT_BOTH        0x00C0
  192 #define ESA_PCM_RLF_OUT_LOCAL       0x0000
  193 #define ESA_PCM_RLF_OUT_REMOTE      0x0100
  194 #define ESA_PCM_RLF_OUT_MUTE        0x0200
  195 #define ESA_PCM_RLF_OUT_BOTH        0x0300
  196 #define ESA_LINE2_DAC_OUT_LOCAL     0x0000
  197 #define ESA_LINE2_DAC_OUT_REMOTE    0x0400
  198 #define ESA_LINE2_DAC_OUT_MUTE      0x0800
  199 #define ESA_LINE2_DAC_OUT_BOTH      0x0C00
  200 #define ESA_HANDSET_OUT_LOCAL       0x0000
  201 #define ESA_HANDSET_OUT_REMOTE      0x1000
  202 #define ESA_HANDSET_OUT_MUTE        0x2000
  203 #define ESA_HANDSET_OUT_BOTH        0x3000
  204 #define ESA_IO_CTRL_OUT_LOCAL       0x0000
  205 #define ESA_IO_CTRL_OUT_REMOTE      0x4000
  206 #define ESA_IO_CTRL_OUT_MUTE        0x8000
  207 #define ESA_IO_CTRL_OUT_BOTH        0xC000
  209 #define ESA_SDO_IN_DEST_CTRL        0x3C
  210 #define ESA_STATUS_ADDR_IN          0x0003
  211 #define ESA_PCM_LR_IN_LOCAL         0x0000
  212 #define ESA_PCM_LR_IN_REMOTE        0x0004
  213 #define ESA_PCM_LR_RESERVED         0x0008
  214 #define ESA_PCM_LR_IN_BOTH          0x000C
  215 #define ESA_LINE1_ADC_IN_LOCAL      0x0000
  216 #define ESA_LINE1_ADC_IN_REMOTE     0x0010
  217 #define ESA_LINE1_ADC_IN_MUTE       0x0020
  218 #define ESA_MIC_ADC_IN_LOCAL        0x0000
  219 #define ESA_MIC_ADC_IN_REMOTE       0x0040
  220 #define ESA_MIC_ADC_IN_MUTE         0x0080
  221 #define ESA_LINE2_DAC_IN_LOCAL      0x0000
  222 #define ESA_LINE2_DAC_IN_REMOTE     0x0400
  223 #define ESA_LINE2_DAC_IN_MUTE       0x0800
  224 #define ESA_HANDSET_IN_LOCAL        0x0000
  225 #define ESA_HANDSET_IN_REMOTE       0x1000
  226 #define ESA_HANDSET_IN_MUTE         0x2000
  227 #define ESA_IO_STATUS_IN_LOCAL      0x0000
  228 #define ESA_IO_STATUS_IN_REMOTE     0x4000
  230 #define ESA_SPDIF_IN_CTRL           0x3E
  231 #define ESA_SPDIF_IN_ENABLE         0x0001
  233 #define ESA_GPIO_DATA               0x60
  234 #define ESA_GPIO_DATA_MASK          0x0FFF
  235 #define ESA_GPIO_HV_STATUS          0x3000
  236 #define ESA_GPIO_PME_STATUS         0x4000
  238 #define ESA_GPIO_MASK               0x64
  239 #define ESA_GPIO_DIRECTION          0x68
  240 #define ESA_GPO_PRIMARY_AC97        0x0001
  241 #define ESA_GPI_LINEOUT_SENSE       0x0004
  242 #define ESA_GPO_SECONDARY_AC97      0x0008
  243 #define ESA_GPI_VOL_DOWN            0x0010
  244 #define ESA_GPI_VOL_UP              0x0020
  245 #define ESA_GPI_IIS_CLK             0x0040
  246 #define ESA_GPI_IIS_LRCLK           0x0080
  247 #define ESA_GPI_IIS_DATA            0x0100
  248 #define ESA_GPI_DOCKING_STATUS      0x0100
  249 #define ESA_GPI_HEADPHONE_SENSE     0x0200
  250 #define ESA_GPO_EXT_AMP_SHUTDOWN    0x1000
  252 /* M3 */
  253 #define ESA_GPO_M3_EXT_AMP_SHUTDN   0x0002
  255 #define ESA_ASSP_INDEX_PORT         0x80
  256 #define ESA_ASSP_MEMORY_PORT        0x82
  257 #define ESA_ASSP_DATA_PORT          0x84
  259 #define ESA_MPU401_DATA_PORT        0x98
  260 #define ESA_MPU401_STATUS_PORT      0x99
  262 #define ESA_CLK_MULT_DATA_PORT      0x9C
  264 #define ESA_ASSP_CONTROL_A          0xA2
  265 #define ESA_ASSP_0_WS_ENABLE        0x01
  266 #define ESA_ASSP_CTRL_A_RESERVED1   0x02
  267 #define ESA_ASSP_CTRL_A_RESERVED2   0x04
  268 #define ESA_ASSP_CLK_49MHZ_SELECT   0x08
  269 #define ESA_FAST_PLU_ENABLE         0x10
  270 #define ESA_ASSP_CTRL_A_RESERVED3   0x20
  271 #define ESA_DSP_CLK_36MHZ_SELECT    0x40
  273 #define ESA_ASSP_CONTROL_B          0xA4
  274 #define ESA_RESET_ASSP              0x00
  275 #define ESA_RUN_ASSP                0x01
  276 #define ESA_ENABLE_ASSP_CLOCK       0x00
  277 #define ESA_STOP_ASSP_CLOCK         0x10
  278 #define ESA_RESET_TOGGLE            0x40
  280 #define ESA_ASSP_CONTROL_C          0xA6
  281 #define ESA_ASSP_HOST_INT_ENABLE    0x01
  282 #define ESA_FM_ADDR_REMAP_DISABLE   0x02
  283 #define ESA_HOST_WRITE_PORT_ENABLE  0x08
  285 #define ESA_ASSP_HOST_INT_STATUS    0xAC
  286 #define ESA_DSP2HOST_REQ_PIORECORD  0x01
  287 #define ESA_DSP2HOST_REQ_I2SRATE    0x02
  288 #define ESA_DSP2HOST_REQ_TIMER      0x04
  290 /*
  291  * ASSP control regs
  292  */
  293 #define ESA_DSP_PORT_TIMER_COUNT    0x06
  295 #define ESA_DSP_PORT_MEMORY_INDEX   0x80
  297 #define ESA_DSP_PORT_MEMORY_TYPE    0x82
  298 #define ESA_MEMTYPE_INTERNAL_CODE   0x0002
  299 #define ESA_MEMTYPE_INTERNAL_DATA   0x0003
  300 #define ESA_MEMTYPE_MASK            0x0003
  302 #define ESA_DSP_PORT_MEMORY_DATA    0x84
  304 #define ESA_DSP_PORT_CONTROL_REG_A  0xA2
  305 #define ESA_DSP_PORT_CONTROL_REG_B  0xA4
  306 #define ESA_DSP_PORT_CONTROL_REG_C  0xA6
  308 #define ESA_REV_A_CODE_MEMORY_BEGIN         0x0000
  309 #define ESA_REV_A_CODE_MEMORY_END           0x0FFF
  310 #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH   0x0040
  311 #define ESA_REV_A_CODE_MEMORY_LENGTH        (ESA_REV_A_CODE_MEMORY_END - ESA_REV_A_CODE_MEMORY_BEGIN + 1)
  313 #define ESA_REV_B_CODE_MEMORY_BEGIN         0x0000
  314 #define ESA_REV_B_CODE_MEMORY_END           0x0BFF
  315 #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH   0x0040
  316 #define ESA_REV_B_CODE_MEMORY_LENGTH        (ESA_REV_B_CODE_MEMORY_END - ESA_REV_B_CODE_MEMORY_BEGIN + 1)
  318 #define ESA_REV_A_DATA_MEMORY_BEGIN         0x1000
  319 #define ESA_REV_A_DATA_MEMORY_END           0x2FFF
  320 #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH   0x0080
  321 #define ESA_REV_A_DATA_MEMORY_LENGTH        (ESA_REV_A_DATA_MEMORY_END - ESA_REV_A_DATA_MEMORY_BEGIN + 1)
  323 #define ESA_REV_B_DATA_MEMORY_BEGIN         0x1000
  324 #define ESA_REV_B_DATA_MEMORY_END           0x2BFF
  325 #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH   0x0080
  326 #define ESA_REV_B_DATA_MEMORY_LENGTH        (ESA_REV_B_DATA_MEMORY_END - ESA_REV_B_DATA_MEMORY_BEGIN + 1)
  329 #define ESA_NUM_UNITS_KERNEL_CODE          16
  330 #define ESA_NUM_UNITS_KERNEL_DATA           2
  332 #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16
  333 #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP  5
  335 /*
  336  * Kernel data layout
  337  */
  339 #define ESA_DP_SHIFT_COUNT                  7
  341 #define ESA_KDATA_BASE_ADDR                 0x1000
  342 #define ESA_KDATA_BASE_ADDR2                0x1080
  344 #define ESA_KDATA_TASK0                     (ESA_KDATA_BASE_ADDR + 0x0000)
  345 #define ESA_KDATA_TASK1                     (ESA_KDATA_BASE_ADDR + 0x0001)
  346 #define ESA_KDATA_TASK2                     (ESA_KDATA_BASE_ADDR + 0x0002)
  347 #define ESA_KDATA_TASK3                     (ESA_KDATA_BASE_ADDR + 0x0003)
  348 #define ESA_KDATA_TASK4                     (ESA_KDATA_BASE_ADDR + 0x0004)
  349 #define ESA_KDATA_TASK5                     (ESA_KDATA_BASE_ADDR + 0x0005)
  350 #define ESA_KDATA_TASK6                     (ESA_KDATA_BASE_ADDR + 0x0006)
  351 #define ESA_KDATA_TASK7                     (ESA_KDATA_BASE_ADDR + 0x0007)
  352 #define ESA_KDATA_TASK_ENDMARK              (ESA_KDATA_BASE_ADDR + 0x0008)
  354 #define ESA_KDATA_CURRENT_TASK              (ESA_KDATA_BASE_ADDR + 0x0009)
  355 #define ESA_KDATA_TASK_SWITCH               (ESA_KDATA_BASE_ADDR + 0x000A)
  357 #define ESA_KDATA_INSTANCE0_POS3D           (ESA_KDATA_BASE_ADDR + 0x000B)
  358 #define ESA_KDATA_INSTANCE1_POS3D           (ESA_KDATA_BASE_ADDR + 0x000C)
  359 #define ESA_KDATA_INSTANCE2_POS3D           (ESA_KDATA_BASE_ADDR + 0x000D)
  360 #define ESA_KDATA_INSTANCE3_POS3D           (ESA_KDATA_BASE_ADDR + 0x000E)
  361 #define ESA_KDATA_INSTANCE4_POS3D           (ESA_KDATA_BASE_ADDR + 0x000F)
  362 #define ESA_KDATA_INSTANCE5_POS3D           (ESA_KDATA_BASE_ADDR + 0x0010)
  363 #define ESA_KDATA_INSTANCE6_POS3D           (ESA_KDATA_BASE_ADDR + 0x0011)
  364 #define ESA_KDATA_INSTANCE7_POS3D           (ESA_KDATA_BASE_ADDR + 0x0012)
  365 #define ESA_KDATA_INSTANCE8_POS3D           (ESA_KDATA_BASE_ADDR + 0x0013)
  366 #define ESA_KDATA_INSTANCE_POS3D_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0014)
  368 #define ESA_KDATA_INSTANCE0_SPKVIRT         (ESA_KDATA_BASE_ADDR + 0x0015)
  369 #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0016)
  371 #define ESA_KDATA_INSTANCE0_SPDIF           (ESA_KDATA_BASE_ADDR + 0x0017)
  372 #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0018)
  374 #define ESA_KDATA_INSTANCE0_MODEM           (ESA_KDATA_BASE_ADDR + 0x0019)
  375 #define ESA_KDATA_INSTANCE_MODEM_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x001A)
  377 #define ESA_KDATA_INSTANCE0_SRC             (ESA_KDATA_BASE_ADDR + 0x001B)
  378 #define ESA_KDATA_INSTANCE1_SRC             (ESA_KDATA_BASE_ADDR + 0x001C)
  379 #define ESA_KDATA_INSTANCE_SRC_ENDMARK      (ESA_KDATA_BASE_ADDR + 0x001D)
  381 #define ESA_KDATA_INSTANCE0_MINISRC         (ESA_KDATA_BASE_ADDR + 0x001E)
  382 #define ESA_KDATA_INSTANCE1_MINISRC         (ESA_KDATA_BASE_ADDR + 0x001F)
  383 #define ESA_KDATA_INSTANCE2_MINISRC         (ESA_KDATA_BASE_ADDR + 0x0020)
  384 #define ESA_KDATA_INSTANCE3_MINISRC         (ESA_KDATA_BASE_ADDR + 0x0021)
  385 #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0022)
  387 #define ESA_KDATA_INSTANCE0_CPYTHRU         (ESA_KDATA_BASE_ADDR + 0x0023)
  388 #define ESA_KDATA_INSTANCE1_CPYTHRU         (ESA_KDATA_BASE_ADDR + 0x0024)
  389 #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0025)
  391 #define ESA_KDATA_CURRENT_DMA               (ESA_KDATA_BASE_ADDR + 0x0026)
  392 #define ESA_KDATA_DMA_SWITCH                (ESA_KDATA_BASE_ADDR + 0x0027)
  393 #define ESA_KDATA_DMA_ACTIVE                (ESA_KDATA_BASE_ADDR + 0x0028)
  395 #define ESA_KDATA_DMA_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0029)
  396 #define ESA_KDATA_DMA_XFER1                 (ESA_KDATA_BASE_ADDR + 0x002A)
  397 #define ESA_KDATA_DMA_XFER2                 (ESA_KDATA_BASE_ADDR + 0x002B)
  398 #define ESA_KDATA_DMA_XFER3                 (ESA_KDATA_BASE_ADDR + 0x002C)
  399 #define ESA_KDATA_DMA_XFER4                 (ESA_KDATA_BASE_ADDR + 0x002D)
  400 #define ESA_KDATA_DMA_XFER5                 (ESA_KDATA_BASE_ADDR + 0x002E)
  401 #define ESA_KDATA_DMA_XFER6                 (ESA_KDATA_BASE_ADDR + 0x002F)
  402 #define ESA_KDATA_DMA_XFER7                 (ESA_KDATA_BASE_ADDR + 0x0030)
  403 #define ESA_KDATA_DMA_XFER8                 (ESA_KDATA_BASE_ADDR + 0x0031)
  404 #define ESA_KDATA_DMA_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0032)
  406 #define ESA_KDATA_I2S_SAMPLE_COUNT          (ESA_KDATA_BASE_ADDR + 0x0033)
  407 #define ESA_KDATA_I2S_INT_METER             (ESA_KDATA_BASE_ADDR + 0x0034)
  408 #define ESA_KDATA_I2S_ACTIVE                (ESA_KDATA_BASE_ADDR + 0x0035)
  410 #define ESA_KDATA_TIMER_COUNT_RELOAD        (ESA_KDATA_BASE_ADDR + 0x0036)
  411 #define ESA_KDATA_TIMER_COUNT_CURRENT       (ESA_KDATA_BASE_ADDR + 0x0037)
  413 #define ESA_KDATA_HALT_SYNCH_CLIENT         (ESA_KDATA_BASE_ADDR + 0x0038)
  414 #define ESA_KDATA_HALT_SYNCH_DMA            (ESA_KDATA_BASE_ADDR + 0x0039)
  415 #define ESA_KDATA_HALT_ACKNOWLEDGE          (ESA_KDATA_BASE_ADDR + 0x003A)
  417 #define ESA_KDATA_ADC1_XFER0                (ESA_KDATA_BASE_ADDR + 0x003B)
  418 #define ESA_KDATA_ADC1_XFER_ENDMARK         (ESA_KDATA_BASE_ADDR + 0x003C)
  419 #define ESA_KDATA_ADC1_LEFT_VOLUME          (ESA_KDATA_BASE_ADDR + 0x003D)
  420 #define ESA_KDATA_ADC1_RIGHT_VOLUME         (ESA_KDATA_BASE_ADDR + 0x003E)
  421 #define ESA_KDATA_ADC1_LEFT_SUR_VOL         (ESA_KDATA_BASE_ADDR + 0x003F)
  422 #define ESA_KDATA_ADC1_RIGHT_SUR_VOL        (ESA_KDATA_BASE_ADDR + 0x0040)
  424 #define ESA_KDATA_ADC2_XFER0                (ESA_KDATA_BASE_ADDR + 0x0041)
  425 #define ESA_KDATA_ADC2_XFER_ENDMARK         (ESA_KDATA_BASE_ADDR + 0x0042)
  426 #define ESA_KDATA_ADC2_LEFT_VOLUME          (ESA_KDATA_BASE_ADDR + 0x0043)
  427 #define ESA_KDATA_ADC2_RIGHT_VOLUME         (ESA_KDATA_BASE_ADDR + 0x0044)
  428 #define ESA_KDATA_ADC2_LEFT_SUR_VOL         (ESA_KDATA_BASE_ADDR + 0x0045)
  429 #define ESA_KDATA_ADC2_RIGHT_SUR_VOL        (ESA_KDATA_BASE_ADDR + 0x0046)
  431 #define ESA_KDATA_CD_XFER0                  (ESA_KDATA_BASE_ADDR + 0x0047)                                      
  432 #define ESA_KDATA_CD_XFER_ENDMARK           (ESA_KDATA_BASE_ADDR + 0x0048)
  433 #define ESA_KDATA_CD_LEFT_VOLUME            (ESA_KDATA_BASE_ADDR + 0x0049)
  434 #define ESA_KDATA_CD_RIGHT_VOLUME           (ESA_KDATA_BASE_ADDR + 0x004A)
  435 #define ESA_KDATA_CD_LEFT_SUR_VOL           (ESA_KDATA_BASE_ADDR + 0x004B)
  436 #define ESA_KDATA_CD_RIGHT_SUR_VOL          (ESA_KDATA_BASE_ADDR + 0x004C)
  438 #define ESA_KDATA_MIC_XFER0                 (ESA_KDATA_BASE_ADDR + 0x004D)
  439 #define ESA_KDATA_MIC_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x004E)
  440 #define ESA_KDATA_MIC_VOLUME                (ESA_KDATA_BASE_ADDR + 0x004F)
  441 #define ESA_KDATA_MIC_SUR_VOL               (ESA_KDATA_BASE_ADDR + 0x0050)
  443 #define ESA_KDATA_I2S_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0051)
  444 #define ESA_KDATA_I2S_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0052)
  446 #define ESA_KDATA_CHI_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0053)
  447 #define ESA_KDATA_CHI_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0054)
  449 #define ESA_KDATA_SPDIF_XFER                (ESA_KDATA_BASE_ADDR + 0x0055)
  450 #define ESA_KDATA_SPDIF_CURRENT_FRAME       (ESA_KDATA_BASE_ADDR + 0x0056)
  451 #define ESA_KDATA_SPDIF_FRAME0              (ESA_KDATA_BASE_ADDR + 0x0057)
  452 #define ESA_KDATA_SPDIF_FRAME1              (ESA_KDATA_BASE_ADDR + 0x0058)
  453 #define ESA_KDATA_SPDIF_FRAME2              (ESA_KDATA_BASE_ADDR + 0x0059)
  455 #define ESA_KDATA_SPDIF_REQUEST             (ESA_KDATA_BASE_ADDR + 0x005A)
  456 #define ESA_KDATA_SPDIF_TEMP                (ESA_KDATA_BASE_ADDR + 0x005B)
  458 #define ESA_KDATA_SPDIFIN_XFER0             (ESA_KDATA_BASE_ADDR + 0x005C)
  459 #define ESA_KDATA_SPDIFIN_XFER_ENDMARK      (ESA_KDATA_BASE_ADDR + 0x005D)
  460 #define ESA_KDATA_SPDIFIN_INT_METER         (ESA_KDATA_BASE_ADDR + 0x005E)
  462 #define ESA_KDATA_DSP_RESET_COUNT           (ESA_KDATA_BASE_ADDR + 0x005F)
  463 #define ESA_KDATA_DEBUG_OUTPUT              (ESA_KDATA_BASE_ADDR + 0x0060)
  465 #define ESA_KDATA_KERNEL_ISR_LIST           (ESA_KDATA_BASE_ADDR + 0x0061)
  467 #define ESA_KDATA_KERNEL_ISR_CBSR1          (ESA_KDATA_BASE_ADDR + 0x0062)
  468 #define ESA_KDATA_KERNEL_ISR_CBER1          (ESA_KDATA_BASE_ADDR + 0x0063)
  469 #define ESA_KDATA_KERNEL_ISR_CBCR           (ESA_KDATA_BASE_ADDR + 0x0064)
  470 #define ESA_KDATA_KERNEL_ISR_AR0            (ESA_KDATA_BASE_ADDR + 0x0065)
  471 #define ESA_KDATA_KERNEL_ISR_AR1            (ESA_KDATA_BASE_ADDR + 0x0066)
  472 #define ESA_KDATA_KERNEL_ISR_AR2            (ESA_KDATA_BASE_ADDR + 0x0067)
  473 #define ESA_KDATA_KERNEL_ISR_AR3            (ESA_KDATA_BASE_ADDR + 0x0068)
  474 #define ESA_KDATA_KERNEL_ISR_AR4            (ESA_KDATA_BASE_ADDR + 0x0069)
  475 #define ESA_KDATA_KERNEL_ISR_AR5            (ESA_KDATA_BASE_ADDR + 0x006A)
  476 #define ESA_KDATA_KERNEL_ISR_BRCR           (ESA_KDATA_BASE_ADDR + 0x006B)
  477 #define ESA_KDATA_KERNEL_ISR_PASR           (ESA_KDATA_BASE_ADDR + 0x006C)
  478 #define ESA_KDATA_KERNEL_ISR_PAER           (ESA_KDATA_BASE_ADDR + 0x006D)
  480 #define ESA_KDATA_CLIENT_SCRATCH0           (ESA_KDATA_BASE_ADDR + 0x006E)
  481 #define ESA_KDATA_CLIENT_SCRATCH1           (ESA_KDATA_BASE_ADDR + 0x006F)
  482 #define ESA_KDATA_KERNEL_SCRATCH            (ESA_KDATA_BASE_ADDR + 0x0070)
  483 #define ESA_KDATA_KERNEL_ISR_SCRATCH        (ESA_KDATA_BASE_ADDR + 0x0071)
  485 #define ESA_KDATA_OUEUE_LEFT                (ESA_KDATA_BASE_ADDR + 0x0072)
  486 #define ESA_KDATA_QUEUE_RIGHT               (ESA_KDATA_BASE_ADDR + 0x0073)
  488 #define ESA_KDATA_ADC1_REQUEST              (ESA_KDATA_BASE_ADDR + 0x0074)
  489 #define ESA_KDATA_ADC2_REQUEST              (ESA_KDATA_BASE_ADDR + 0x0075)
  490 #define ESA_KDATA_CD_REQUEST                (ESA_KDATA_BASE_ADDR + 0x0076)
  491 #define ESA_KDATA_MIC_REQUEST               (ESA_KDATA_BASE_ADDR + 0x0077)
  493 #define ESA_KDATA_ADC1_MIXER_REQUEST        (ESA_KDATA_BASE_ADDR + 0x0078)
  494 #define ESA_KDATA_ADC2_MIXER_REQUEST        (ESA_KDATA_BASE_ADDR + 0x0079)
  495 #define ESA_KDATA_CD_MIXER_REQUEST          (ESA_KDATA_BASE_ADDR + 0x007A)
  496 #define ESA_KDATA_MIC_MIXER_REQUEST         (ESA_KDATA_BASE_ADDR + 0x007B)
  497 #define ESA_KDATA_MIC_SYNC_COUNTER          (ESA_KDATA_BASE_ADDR + 0x007C)
  499 /*
  500  * second 'segment' (?) reserved for mixer
  501  * buffers..
  502  */
  504 #define ESA_KDATA_MIXER_WORD0               (ESA_KDATA_BASE_ADDR2 + 0x0000)
  505 #define ESA_KDATA_MIXER_WORD1               (ESA_KDATA_BASE_ADDR2 + 0x0001)
  506 #define ESA_KDATA_MIXER_WORD2               (ESA_KDATA_BASE_ADDR2 + 0x0002)
  507 #define ESA_KDATA_MIXER_WORD3               (ESA_KDATA_BASE_ADDR2 + 0x0003)
  508 #define ESA_KDATA_MIXER_WORD4               (ESA_KDATA_BASE_ADDR2 + 0x0004)
  509 #define ESA_KDATA_MIXER_WORD5               (ESA_KDATA_BASE_ADDR2 + 0x0005)
  510 #define ESA_KDATA_MIXER_WORD6               (ESA_KDATA_BASE_ADDR2 + 0x0006)
  511 #define ESA_KDATA_MIXER_WORD7               (ESA_KDATA_BASE_ADDR2 + 0x0007)
  512 #define ESA_KDATA_MIXER_WORD8               (ESA_KDATA_BASE_ADDR2 + 0x0008)
  513 #define ESA_KDATA_MIXER_WORD9               (ESA_KDATA_BASE_ADDR2 + 0x0009)
  514 #define ESA_KDATA_MIXER_WORDA               (ESA_KDATA_BASE_ADDR2 + 0x000A)
  515 #define ESA_KDATA_MIXER_WORDB               (ESA_KDATA_BASE_ADDR2 + 0x000B)
  516 #define ESA_KDATA_MIXER_WORDC               (ESA_KDATA_BASE_ADDR2 + 0x000C)
  517 #define ESA_KDATA_MIXER_WORDD               (ESA_KDATA_BASE_ADDR2 + 0x000D)
  518 #define ESA_KDATA_MIXER_WORDE               (ESA_KDATA_BASE_ADDR2 + 0x000E)
  519 #define ESA_KDATA_MIXER_WORDF               (ESA_KDATA_BASE_ADDR2 + 0x000F)
  521 #define ESA_KDATA_MIXER_XFER0               (ESA_KDATA_BASE_ADDR2 + 0x0010)
  522 #define ESA_KDATA_MIXER_XFER1               (ESA_KDATA_BASE_ADDR2 + 0x0011)
  523 #define ESA_KDATA_MIXER_XFER2               (ESA_KDATA_BASE_ADDR2 + 0x0012)
  524 #define ESA_KDATA_MIXER_XFER3               (ESA_KDATA_BASE_ADDR2 + 0x0013)
  525 #define ESA_KDATA_MIXER_XFER4               (ESA_KDATA_BASE_ADDR2 + 0x0014)
  526 #define ESA_KDATA_MIXER_XFER5               (ESA_KDATA_BASE_ADDR2 + 0x0015)
  527 #define ESA_KDATA_MIXER_XFER6               (ESA_KDATA_BASE_ADDR2 + 0x0016)
  528 #define ESA_KDATA_MIXER_XFER7               (ESA_KDATA_BASE_ADDR2 + 0x0017)
  529 #define ESA_KDATA_MIXER_XFER8               (ESA_KDATA_BASE_ADDR2 + 0x0018)
  530 #define ESA_KDATA_MIXER_XFER9               (ESA_KDATA_BASE_ADDR2 + 0x0019)
  531 #define ESA_KDATA_MIXER_XFER_ENDMARK        (ESA_KDATA_BASE_ADDR2 + 0x001A)
  533 #define ESA_KDATA_MIXER_TASK_NUMBER         (ESA_KDATA_BASE_ADDR2 + 0x001B)
  534 #define ESA_KDATA_CURRENT_MIXER             (ESA_KDATA_BASE_ADDR2 + 0x001C)
  535 #define ESA_KDATA_MIXER_ACTIVE              (ESA_KDATA_BASE_ADDR2 + 0x001D)
  536 #define ESA_KDATA_MIXER_BANK_STATUS         (ESA_KDATA_BASE_ADDR2 + 0x001E)
  537 #define ESA_KDATA_DAC_LEFT_VOLUME               (ESA_KDATA_BASE_ADDR2 + 0x001F)
  538 #define ESA_KDATA_DAC_RIGHT_VOLUME          (ESA_KDATA_BASE_ADDR2 + 0x0020)
  540 #define ESA_MAX_INSTANCE_MINISRC            (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - ESA_KDATA_INSTANCE0_MINISRC)
  541 #define ESA_MAX_VIRTUAL_DMA_CHANNELS        (ESA_KDATA_DMA_XFER_ENDMARK - ESA_KDATA_DMA_XFER0)
  542 #define ESA_MAX_VIRTUAL_MIXER_CHANNELS      (ESA_KDATA_MIXER_XFER_ENDMARK - ESA_KDATA_MIXER_XFER0)
  543 #define ESA_MAX_VIRTUAL_ADC1_CHANNELS       (ESA_KDATA_ADC1_XFER_ENDMARK - ESA_KDATA_ADC1_XFER0)
  545 /*
  546  * client data area offsets
  547  */
  548 #define ESA_CDATA_INSTANCE_READY            0x00
  550 #define ESA_CDATA_HOST_SRC_ADDRL            0x01
  551 #define ESA_CDATA_HOST_SRC_ADDRH            0x02
  552 #define ESA_CDATA_HOST_SRC_END_PLUS_1L      0x03
  553 #define ESA_CDATA_HOST_SRC_END_PLUS_1H      0x04
  554 #define ESA_CDATA_HOST_SRC_CURRENTL         0x05
  555 #define ESA_CDATA_HOST_SRC_CURRENTH         0x06
  557 #define ESA_CDATA_IN_BUF_CONNECT            0x07
  558 #define ESA_CDATA_OUT_BUF_CONNECT           0x08
  560 #define ESA_CDATA_IN_BUF_BEGIN              0x09
  561 #define ESA_CDATA_IN_BUF_END_PLUS_1         0x0A
  562 #define ESA_CDATA_IN_BUF_HEAD               0x0B
  563 #define ESA_CDATA_IN_BUF_TAIL               0x0C
  564 #define ESA_CDATA_OUT_BUF_BEGIN             0x0D
  565 #define ESA_CDATA_OUT_BUF_END_PLUS_1        0x0E
  566 #define ESA_CDATA_OUT_BUF_HEAD              0x0F
  567 #define ESA_CDATA_OUT_BUF_TAIL              0x10
  569 #define ESA_CDATA_DMA_CONTROL               0x11
  570 #define ESA_CDATA_RESERVED                  0x12
  572 #define ESA_CDATA_FREQUENCY                 0x13
  573 #define ESA_CDATA_LEFT_VOLUME               0x14
  574 #define ESA_CDATA_RIGHT_VOLUME              0x15
  575 #define ESA_CDATA_LEFT_SUR_VOL              0x16
  576 #define ESA_CDATA_RIGHT_SUR_VOL             0x17
  578 #define ESA_CDATA_HEADER_LEN                0x18
  580 #define ESA_SRC3_DIRECTION_OFFSET           ESA_CDATA_HEADER_LEN
  581 #define ESA_SRC3_MODE_OFFSET                (ESA_CDATA_HEADER_LEN + 1)
  582 #define ESA_SRC3_WORD_LENGTH_OFFSET         (ESA_CDATA_HEADER_LEN + 2)
  583 #define ESA_SRC3_PARAMETER_OFFSET           (ESA_CDATA_HEADER_LEN + 3)
  584 #define ESA_SRC3_COEFF_ADDR_OFFSET          (ESA_CDATA_HEADER_LEN + 8)
  585 #define ESA_SRC3_FILTAP_ADDR_OFFSET         (ESA_CDATA_HEADER_LEN + 10)
  586 #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET     (ESA_CDATA_HEADER_LEN + 16)
  587 #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET    (ESA_CDATA_HEADER_LEN + 17)
  589 #define ESA_MINISRC_IN_BUFFER_SIZE   (0x50 * 2)
  590 #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
  591 #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
  592 #define ESA_MINISRC_TMP_BUFFER_SIZE  (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2)
  593 #define ESA_MINISRC_BIQUAD_STAGE        2
  594 #define ESA_MINISRC_COEF_LOC            0x175
  596 #define ESA_DMACONTROL_BLOCK_MASK           0x000F
  597 #define  ESA_DMAC_BLOCK0_SELECTOR           0x0000
  598 #define  ESA_DMAC_BLOCK1_SELECTOR           0x0001
  599 #define  ESA_DMAC_BLOCK2_SELECTOR           0x0002
  600 #define  ESA_DMAC_BLOCK3_SELECTOR           0x0003
  601 #define  ESA_DMAC_BLOCK4_SELECTOR           0x0004
  602 #define  ESA_DMAC_BLOCK5_SELECTOR           0x0005
  603 #define  ESA_DMAC_BLOCK6_SELECTOR           0x0006
  604 #define  ESA_DMAC_BLOCK7_SELECTOR           0x0007
  605 #define  ESA_DMAC_BLOCK8_SELECTOR           0x0008
  606 #define  ESA_DMAC_BLOCK9_SELECTOR           0x0009
  607 #define  ESA_DMAC_BLOCKA_SELECTOR           0x000A
  608 #define  ESA_DMAC_BLOCKB_SELECTOR           0x000B
  609 #define  ESA_DMAC_BLOCKC_SELECTOR           0x000C
  610 #define  ESA_DMAC_BLOCKD_SELECTOR           0x000D
  611 #define  ESA_DMAC_BLOCKE_SELECTOR           0x000E
  612 #define  ESA_DMAC_BLOCKF_SELECTOR           0x000F
  613 #define ESA_DMACONTROL_PAGE_MASK            0x00F0
  614 #define  ESA_DMAC_PAGE0_SELECTOR            0x0030
  615 #define  ESA_DMAC_PAGE1_SELECTOR            0x0020
  616 #define  ESA_DMAC_PAGE2_SELECTOR            0x0010
  617 #define  ESA_DMAC_PAGE3_SELECTOR            0x0000
  618 #define ESA_DMACONTROL_AUTOREPEAT           0x1000
  619 #define ESA_DMACONTROL_STOPPED              0x2000
  620 #define ESA_DMACONTROL_DIRECTION            0x0100