BRGPHY_MII_IMR    426 dev/mii/brgphy.c 	PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
BRGPHY_MII_IMR   3392 dev/pci/if_bge.c 			bge_miibus_writereg(&sc->bge_dev, 1, BRGPHY_MII_IMR,
BRGPHY_MII_IMR   2053 dev/pci/if_sk.c 			    SK_PHYADDR_BCOM, BRGPHY_MII_IMR, 0xFF00);
BRGPHY_MII_IMR   2247 dev/pci/if_sk.c 		    SK_PHYADDR_BCOM, BRGPHY_MII_IMR, 0xFFF0);