BMCR_FDX          218 dev/mii/exphy.c 	PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
BMCR_FDX          289 dev/mii/icsphy.c 	PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
BMCR_FDX           69 dev/mii/mii_physubr.c 	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,	0 },
BMCR_FDX           75 dev/mii/mii_physubr.c 	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,	0 },
BMCR_FDX           79 dev/mii/mii_physubr.c 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,		0 },
BMCR_FDX           83 dev/mii/mii_physubr.c 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,		GTCR_ADV_1000TFDX },
BMCR_FDX          319 dev/mii/tlphy.c 	if (bmcr & BMCR_FDX)
BMCR_FDX          370 dev/mii/tlphy.c 			PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_FDX);
BMCR_FDX         1502 dev/sbus/be.c  			bmcr |= BMCR_FDX;
BMCR_FDX         1504 dev/sbus/be.c  			bmcr &= ~BMCR_FDX;
BMCR_FDX         1614 dev/sbus/be.c  	switch (bmcr & (BMCR_S100 | BMCR_FDX)) {
BMCR_FDX         1615 dev/sbus/be.c  	case (BMCR_S100 | BMCR_FDX):
BMCR_FDX         1621 dev/sbus/be.c  	case BMCR_FDX: