bcr              1434 dev/pci/pccbb.c 	u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
bcr              1437 dev/pci/pccbb.c 	bcr |= CB_BCR_RESET_ENABLE;
bcr              1438 dev/pci/pccbb.c 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
bcr              1443 dev/pci/pccbb.c 		bcr &= ~CB_BCR_RESET_ENABLE;
bcr              1444 dev/pci/pccbb.c 		pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
bcr              3042 dev/pci/pccbb.c 		pcireg_t bcr = pci_conf_read(pc, tag, PCI_BCR_INTR);
bcr              3044 dev/pci/pccbb.c 		bcr &= ~(CB_BCR_PREFETCH_MEMWIN0 | CB_BCR_PREFETCH_MEMWIN1);
bcr              3046 dev/pci/pccbb.c 			bcr |= CB_BCR_PREFETCH_MEMWIN0;
bcr              3048 dev/pci/pccbb.c 			bcr |= CB_BCR_PREFETCH_MEMWIN1;
bcr              3049 dev/pci/pccbb.c 		pci_conf_write(pc, tag, PCI_BCR_INTR, bcr);
bcr                76 dev/sbus/vigra.c 	u_int32_t	bcr;	/* board control register */
bcr               589 dev/sbus/vigra.c 		sc->sc_regs->bcr = 0;
bcr               591 dev/sbus/vigra.c 		sc->sc_regs->bcr = 1;