bar 325 dev/cardbus/cardbus.c cis->bar[bar_index].flags = tuple[2]; bar 326 dev/cardbus/cardbus.c cis->bar[bar_index].size = (tuple[4] << 0) | bar 300 dev/cardbus/cardbusvar.h } bar[7]; bar 202 dev/cardbus/com_cardbus.c if (ca->ca_cis.bar[i].size == 0) bar 206 dev/cardbus/com_cardbus.c CARDBUS_CIS_ASI_BAR(ca->ca_cis.bar[i].flags)) bar 216 dev/cardbus/com_cardbus.c csc->cc_reg = CARDBUS_CIS_ASI_BAR(ca->ca_cis.bar[index].flags); bar 217 dev/cardbus/com_cardbus.c if ((ca->ca_cis.bar[index].flags & 0x10) == 0) bar 233 dev/cardbus/com_cardbus.c if (ca->ca_cis.bar[i].size == 0) bar 237 dev/cardbus/com_cardbus.c CARDBUS_CIS_ASI_BAR(ca->ca_cis.bar[i].flags)) bar 240 dev/cardbus/com_cardbus.c DEVNAME(csc), CARDBUS_CIS_ASI_BAR(ca->ca_cis.bar[i].flags), bar 241 dev/cardbus/com_cardbus.c (ca->ca_cis.bar[i].flags & 0x10) ? "i/o" : "mem", bar 242 dev/cardbus/com_cardbus.c ca->ca_cis.bar[i].size); bar 107 dev/cardbus/puc_cardbus.c int bar; bar 110 dev/cardbus/puc_cardbus.c bar = PCI_MAPREG_START + 4 * i; bar 111 dev/cardbus/puc_cardbus.c if (!cardbus_mapreg_probe(cc, cf, ca->ca_tag, bar, &type)) bar 115 dev/cardbus/puc_cardbus.c bar, type, 0, bar 119 dev/cardbus/puc_cardbus.c sc->sc_dev.dv_xname, (long)bar); bar 353 dev/pci/agp.c agp_map_aperture(struct vga_pci_softc *sc, u_int32_t bar, u_int32_t memtype) bar 359 dev/pci/agp.c if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar, bar 356 dev/pci/if_san_common.h unsigned long bar; bar 339 dev/pci/if_san_xilinx.c sdla_getcfg(card->hw, SDLA_BASEADDR, &card->u.xilinx.bar); bar 253 dev/pci/if_san_xilinx.h unsigned char bar; bar 185 dev/pci/puc.c int bar; bar 188 dev/pci/puc.c bar = PCI_MAPREG_START + 4 * i; bar 189 dev/pci/puc.c if (!pci_mapreg_probe(pa->pa_pc, pa->pa_tag, bar, &type)) bar 192 dev/pci/puc.c sc->sc_bar_mappings[i].mapped = (pci_mapreg_map(pa, bar, type, bar 201 dev/pci/puc.c sc->sc_dev.dv_xname, (long)bar); bar 230 dev/pci/puc.c int i, bar; bar 255 dev/pci/puc.c bar = PUC_PORT_BAR_INDEX(sc->sc_desc->ports[i].bar); bar 256 dev/pci/puc.c if (!sc->sc_bar_mappings[bar].mapped) { bar 260 dev/pci/puc.c sc->sc_desc->ports[i].bar); bar 268 dev/pci/puc.c paa->a = sc->sc_bar_mappings[bar].a; bar 269 dev/pci/puc.c paa->t = sc->sc_bar_mappings[bar].t; bar 271 dev/pci/puc.c if (bus_space_subregion(sc->sc_bar_mappings[bar].t, bar 272 dev/pci/puc.c sc->sc_bar_mappings[bar].h, sc->sc_desc->ports[i].offset, bar 273 dev/pci/puc.c sc->sc_bar_mappings[bar].s - sc->sc_desc->ports[i].offset, bar 284 dev/pci/puc.c puc_port_type_name(paa->type), bar, (int)paa->a, bar 48 dev/pci/pucvar.h u_char bar; bar 65 dev/pci/pucvar.h #define PUC_PORT_BAR_INDEX(bar) (((bar) - PCI_MAPREG_START) / 4) bar 296 dev/pci/siop_pci_common.c int bar; bar 299 dev/pci/siop_pci_common.c bar = 0x18; bar 302 dev/pci/siop_pci_common.c bar = 0x1c; bar 308 dev/pci/siop_pci_common.c if (pci_mapreg_map(pa, bar, memtype, 0, bar 304 dev/pci/sti_pci.c int bar) bar 311 dev/pci/sti_pci.c if (bar == 0) { bar 317 dev/pci/sti_pci.c if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) { bar 320 dev/pci/sti_pci.c sc->sc_dev.dv_xname, bar, region); bar 325 dev/pci/sti_pci.c cf = pci_conf_read(pa->pa_pc, pa->pa_tag, bar); bar 328 dev/pci/sti_pci.c rc = pci_io_find(pa->pa_pc, pa->pa_tag, bar, &addr, &size); bar 330 dev/pci/sti_pci.c rc = pci_mem_find(pa->pa_pc, pa->pa_tag, bar, &addr, &size, bar 336 dev/pci/sti_pci.c sc->sc_dev.dv_xname, bar, region);