sc_revision 192 dev/cardbus/if_fxp_cardbus.c sc->sc_revision = PCI_REVISION(ca->ca_class); sc_revision 425 dev/ic/fxp.c if (sc->sc_revision >= FXP_REV_82558_A4) { sc_revision 1194 dev/ic/fxp.c if (sc->sc_revision >= FXP_REV_82558_A4) sc_revision 1817 dev/ic/fxp.c if (sc->sc_revision == uc->revision) sc_revision 141 dev/ic/fxpvar.h u_int32_t sc_revision; /* chip revision */ sc_revision 3339 dev/isa/gus.c sc->sc_mixer.sc_flags = (sc->sc_revision == 5) ? ICS_FLIP : 0; sc_revision 3428 dev/isa/gus.c sc->sc_revision = c; sc_revision 3430 dev/isa/gus.c sc->sc_revision = 0; sc_revision 3501 dev/isa/gus.c if (sc->sc_revision >= 5 && sc->sc_revision <= 9) { sc_revision 3505 dev/isa/gus.c if (sc->sc_revision < 10 || !gus_init_cs4231(sc)) { sc_revision 3560 dev/isa/gus.c sc->sc_revision); sc_revision 3562 dev/isa/gus.c printf(": ver %d", sc->sc_revision); sc_revision 3563 dev/isa/gus.c if (sc->sc_revision >= 10) sc_revision 161 dev/isa/gusvar.h u_char sc_revision; /* Board revision of GUS */ sc_revision 118 dev/isa/wds.c int sc_revision; sc_revision 134 dev/isa/wds.c #define NEEDBUFFER(sc) (sc->sc_revision < 0x800) sc_revision 1021 dev/isa/wds.c sc->sc_revision = (scb->cmd.targ << 8) | scb->cmd.scb.opcode; sc_revision 282 dev/pci/autri.c if (sc->sc_revision > 0x01) sc_revision 362 dev/pci/autri.c if (sc->sc_revision > 0x01) sc_revision 522 dev/pci/autri.c sc->sc_revision = PCI_REVISION(pa->pa_class); sc_revision 88 dev/pci/autrivar.h int sc_revision; sc_revision 665 dev/pci/auvia.c strncpy(retp->version, sc->sc_revision, sizeof(retp->version)); sc_revision 58 dev/pci/auviavar.h char sc_revision[8]; sc_revision 215 dev/pci/eso.c sc->sc_revision = PCI_REVISION(pa->pa_class); sc_revision 217 dev/pci/eso.c if (sc->sc_revision < sc_revision 219 dev/pci/eso.c printf(": %s", eso_rev2model[sc->sc_revision]); sc_revision 221 dev/pci/eso.c printf(": (unknown rev. 0x%02x)", sc->sc_revision); sc_revision 901 dev/pci/eso.c sc->sc_revision); sc_revision 902 dev/pci/eso.c if (sc->sc_revision <= sc_revision 904 dev/pci/eso.c strlcpy(retp->config, eso_rev2model[sc->sc_revision], sc_revision 88 dev/pci/esovar.h unsigned int sc_revision; /* PCI Revision ID */ sc_revision 162 dev/pci/if_fxp_pci.c sc->sc_revision = PCI_REVISION(pa->pa_class); sc_revision 191 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82558_A4) sc_revision 193 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82559_A0) sc_revision 195 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82559S_A) sc_revision 197 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82550) sc_revision 199 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82551_E) sc_revision 227 dev/pci/if_fxp_pci.c (sc->sc_revision >= 8 && sc->sc_revision <= 16)))) sc_revision 233 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82558_A4) sc_revision 718 dev/pci/yds.c sc->sc_revision = PCI_REVISION(pa->pa_class); sc_revision 871 dev/pci/yds.c sc->sc->sc_revision < 2) { sc_revision 347 dev/pci/ydsreg.h int sc_revision;