regval 1489 dev/acpi/acpi.c int regval;
regval 1525 dev/acpi/acpi.c regval = 0;
regval 1535 dev/acpi/acpi.c regval = bus_space_read_1(sc->sc_iot, ioh, offset);
regval 1538 dev/acpi/acpi.c regval = bus_space_read_2(sc->sc_iot, ioh, offset);
regval 1541 dev/acpi/acpi.c regval = bus_space_read_4(sc->sc_iot, ioh, offset);
regval 1547 dev/acpi/acpi.c sc->sc_pmregs[reg].addr, offset, regval);
regval 1548 dev/acpi/acpi.c return (regval);
regval 1553 dev/acpi/acpi.c acpi_write_pmreg(struct acpi_softc *sc, int reg, int offset, int regval)
regval 1562 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_EN, offset, regval);
regval 1563 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_EN, offset, regval);
regval 1566 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_STS, offset, regval);
regval 1567 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_STS, offset, regval);
regval 1570 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, offset, regval);
regval 1571 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, offset, regval);
regval 1577 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len>>1, regval);
regval 1586 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len>>1, regval);
regval 1605 dev/acpi/acpi.c bus_space_write_1(sc->sc_iot, ioh, offset, regval);
regval 1608 dev/acpi/acpi.c bus_space_write_2(sc->sc_iot, ioh, offset, regval);
regval 1611 dev/acpi/acpi.c bus_space_write_4(sc->sc_iot, ioh, offset, regval);
regval 1616 dev/acpi/acpi.c sc->sc_pmregs[reg].name, sc->sc_pmregs[reg].addr, offset, regval);
regval 1048 dev/ic/ac97.c u_int16_t reg, val, regval, id = 0;
regval 1080 dev/ic/ac97.c ac97_read(as, reg, ®val))
regval 1082 dev/ic/ac97.c p->sample_rate = regval;
regval 1086 dev/ic/ac97.c DPRINTFN(5, (" %lu\n", regval));
regval 193 dev/ic/bt485.c u_int8_t regval;
regval 206 dev/ic/bt485.c regval = data->ramdac_rd(data->cookie, BT485_REG_COMMAND_0);
regval 207 dev/ic/bt485.c regval |= 0x80;
regval 212 dev/ic/bt485.c regval |= 0x02;
regval 213 dev/ic/bt485.c data->ramdac_wr(data->cookie, BT485_REG_COMMAND_0, regval);
regval 219 dev/ic/bt485.c regval = data->ramdac_rd(data->cookie, BT485_REG_COMMAND_2);
regval 220 dev/ic/bt485.c regval &= ~0x03;
regval 221 dev/ic/bt485.c regval |= 0x24;
regval 222 dev/ic/bt485.c data->ramdac_wr(data->cookie, BT485_REG_COMMAND_2, regval);
regval 225 dev/ic/bt485.c regval = bt485_rd_i(data, BT485_IREG_COMMAND_3);
regval 226 dev/ic/bt485.c regval |= 0x04;
regval 227 dev/ic/bt485.c regval |= 0x08;
regval 228 dev/ic/bt485.c bt485_wr_i(data, BT485_IREG_COMMAND_3, regval);
regval 534 dev/ic/bt485.c u_int8_t regval;
regval 541 dev/ic/bt485.c regval = data->ramdac_rd(data->cookie, BT485_REG_COMMAND_2);
regval 543 dev/ic/bt485.c regval |= 0x01;
regval 545 dev/ic/bt485.c regval &= ~0x03;
regval 546 dev/ic/bt485.c data->ramdac_wr(data->cookie, BT485_REG_COMMAND_2, regval);
regval 574 dev/ic/bt485.c regval = bt485_rd_i(data, BT485_IREG_COMMAND_3);
regval 575 dev/ic/bt485.c regval &= ~0x03;
regval 576 dev/ic/bt485.c bt485_wr_i(data, BT485_IREG_COMMAND_3, regval);
regval 588 dev/ic/bt485.c regval = bt485_rd_i(data, BT485_IREG_COMMAND_3);
regval 589 dev/ic/bt485.c regval &= ~0x03; regval |= 0x02;
regval 590 dev/ic/bt485.c bt485_wr_i(data, BT485_IREG_COMMAND_3, regval);
regval 597 dev/ic/bt485.c regval = bt485_rd_i(data, BT485_IREG_COMMAND_3);
regval 598 dev/ic/bt485.c regval &= ~0x03;
regval 599 dev/ic/bt485.c bt485_wr_i(data, BT485_IREG_COMMAND_3, regval);
regval 262 dev/ic/vga.c u_int8_t regval;
regval 274 dev/ic/vga.c regval = bus_space_read_1(iot, ioh_vga, 0xc);
regval 275 dev/ic/vga.c mono = !(regval & 1);
regval 302 dev/ic/vga.c regval = bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR);
regval 304 dev/ic/vga.c bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval ^ 0x0f);
regval 308 dev/ic/vga.c if (bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR) != (regval ^ 0x0f))
regval 311 dev/ic/vga.c bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval);
regval 747 dev/pci/agp_i810.c u_int32_t regval, i;
regval 755 dev/pci/agp_i810.c regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL);
regval 756 dev/pci/agp_i810.c if (regval != (isc->gatt->ag_physical | 1)) {
regval 759 dev/pci/agp_i810.c regval);
regval 524 dev/pci/auvia.c u_int16_t regval;
regval 609 dev/pci/auvia.c regval = (p->channels == 2 ? AUVIA_RPMODE_STEREO : 0)
regval 616 dev/pci/auvia.c sc->sc_play.sc_reg = regval;
regval 618 dev/pci/auvia.c sc->sc_record.sc_reg = regval;
regval 7696 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 7709 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
regval 7724 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
regval 7730 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 7741 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
regval 7763 dev/pci/if_em_hw.c hsflctl.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
regval 7765 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
regval 7769 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 7816 dev/pci/if_em_hw.c hsflctl.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
regval 7820 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
regval 7846 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 7895 dev/pci/if_em_hw.c hsflctl.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
regval 7899 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
regval 7922 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 8051 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 8089 dev/pci/if_em_hw.c hsflctl.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
regval 8091 dev/pci/if_em_hw.c E1000_WRITE_ICH_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
regval 8109 dev/pci/if_em_hw.c hsfsts.regval = E1000_READ_ICH_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
regval 3303 dev/pci/if_em_hw.h uint16_t regval;
regval 3316 dev/pci/if_em_hw.h uint16_t regval;
regval 3327 dev/pci/if_em_hw.h uint16_t regval;