regbase_win 2007 dev/pci/pccbb.c int regbase_win = 0x8 + win * 0x04; regbase_win 2015 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SIA_START_LOW, regbase_win 2017 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SIA_START_HIGH, regbase_win 2020 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SIA_STOP_LOW, regbase_win 2022 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SIA_STOP_HIGH, regbase_win 2048 dev/pci/pccbb.c Pcic_read(ph, regbase_win + PCIC_SIA_START_LOW); regbase_win 2050 dev/pci/pccbb.c Pcic_read(ph, regbase_win + PCIC_SIA_START_HIGH); regbase_win 2052 dev/pci/pccbb.c Pcic_read(ph, regbase_win + PCIC_SIA_STOP_LOW); regbase_win 2054 dev/pci/pccbb.c Pcic_read(ph, regbase_win + PCIC_SIA_STOP_HIGH); regbase_win 2391 dev/pci/pccbb.c int regbase_win; regbase_win 2408 dev/pci/pccbb.c regbase_win = 0x10 + win * 0x08; regbase_win 2428 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SMM_START_LOW, start_low); regbase_win 2429 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SMM_START_HIGH, start_high); regbase_win 2441 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SMM_STOP_LOW, stop_low); regbase_win 2442 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_SMM_STOP_HIGH, stop_high); regbase_win 2450 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_CMA_LOW, off_low); regbase_win 2451 dev/pci/pccbb.c Pcic_write(ph, regbase_win + PCIC_CMA_HIGH, off_high); regbase_win 2461 dev/pci/pccbb.c r1 = Pcic_read(ph, regbase_win + PCIC_SMM_START_LOW); regbase_win 2462 dev/pci/pccbb.c r2 = Pcic_read(ph, regbase_win + PCIC_SMM_START_HIGH); regbase_win 2463 dev/pci/pccbb.c r3 = Pcic_read(ph, regbase_win + PCIC_SMM_STOP_LOW); regbase_win 2464 dev/pci/pccbb.c r4 = Pcic_read(ph, regbase_win + PCIC_SMM_STOP_HIGH); regbase_win 2465 dev/pci/pccbb.c r5 = Pcic_read(ph, regbase_win + PCIC_CMA_LOW); regbase_win 2466 dev/pci/pccbb.c r6 = Pcic_read(ph, regbase_win + PCIC_CMA_HIGH);