pctl              150 arch/i386/pci/gscpm.c 	u_int32_t pctl;
pctl              152 arch/i386/pci/gscpm.c 	pctl = bus_space_read_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_P_CNT);
pctl              156 arch/i386/pci/gscpm.c 		pctl &= ~GSCPM_P_CNT_THTEN;
pctl              161 arch/i386/pci/gscpm.c 		pctl = (0xf0 | GSCPM_P_CNT_THTEN |
pctl              166 arch/i386/pci/gscpm.c 	bus_space_write_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_P_CNT, pctl);
pctl              221 dev/mii/qsphy.c 	int bmsr, bmcr, pctl;
pctl              247 dev/mii/qsphy.c 		pctl = PHY_READ(sc, MII_QSPHY_PCTL) |
pctl              249 dev/mii/qsphy.c 		switch (pctl & PCTL_OPMASK) {
pctl              154 dev/pci/cs4280.c 	u_int32_t pctl;
pctl             1478 dev/pci/cs4280.c 	u_int32_t pfie, pctl, mem, pdtc;
pctl             1555 dev/pci/cs4280.c 	pctl = BA1READ4(sc, CS4280_PCTL) & ~PCTL_MASK;
pctl             1556 dev/pci/cs4280.c 	pctl |= sc->pctl;
pctl             1557 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PCTL, pctl);
pctl             1748 dev/pci/cs4280.c 	sc->pctl = mem & PCTL_MASK; /* save startup value */