omr 674 dev/pci/ises.c ses->omr = READ_REG(sc, ISES_A_OQD); omr 676 dev/pci/ises.c dv, ses->omr)); omr 980 dev/pci/ises.c if (sc->sc_sessions[sesn].omr == 0) { omr 1012 dev/pci/ises.c ses->omr |= ISES_SELR_BCHU_DIS; omr 1233 dev/pci/ises.c q->q_session.omr |= ISES_SELR_BCHU_DIS; omr 1240 dev/pci/ises.c q->q_session.omr |= ISES_SOMR_BOMR_3DES; omr 1242 dev/pci/ises.c q->q_session.omr |= ISES_SOMR_BOMR_DES; omr 1245 dev/pci/ises.c q->q_session.omr |= ISES_SOMR_FMR_CBC; omr 1249 dev/pci/ises.c q->q_session.omr |= ISES_SOMR_EDR; omr 1271 dev/pci/ises.c q->q_session.omr &= ~ISES_SOMR_EDR; omr 1302 dev/pci/ises.c q->q_session.omr |= ISES_HOMR_HFR_MD5; omr 1305 dev/pci/ises.c q->q_session.omr |= ISES_HOMR_HFR_SHA1; omr 1309 dev/pci/ises.c q->q_session.omr |= ISES_HOMR_HFR_RMD160; omr 1475 dev/pci/ises.c if (q->q_session.omr & ISES_SOMR_EDR) { omr 1706 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->omr, NULL); omr 1860 dev/pci/ises.c ses.omr = ISES_SELR_BCHU_HISOF | ISES_HOMR_HFR_SHA1 | omr 2059 dev/pci/ises.c u_int32_t omr = sc->sc_sessions[sc->sc_cursession].omr; omr 2062 dev/pci/ises.c if (omr & ISES_SELR_BCHU_EH) omr 2067 dev/pci/ises.c if (omr & ISES_SELR_BCHU_HISOF) omr 2070 dev/pci/ises.c if (omr & ISES_SELR_BCHU_DIS) omr 2078 dev/pci/ises.c if (omr & ISES_HOMR_HMTR) omr 2083 dev/pci/ises.c printf ("ER=%d ", (omr & ISES_HOMR_ER) >> 20); /* ick */ omr 2086 dev/pci/ises.c switch (omr & ISES_HOMR_HFR) { omr 2108 dev/pci/ises.c switch (omr & ISES_SOMR_BOMR) { omr 2125 dev/pci/ises.c if (omr & ISES_SOMR_BOMR_SAFER) omr 2132 dev/pci/ises.c if (omr & ISES_SOMR_EDR) omr 2137 dev/pci/ises.c switch (omr & ISES_SOMR_FMR) { omr 354 dev/pci/isesreg.h u_int32_t omr; /* Operation method register */