miir 222 dev/ic/mtd8xx.c u_int32_t miir, mask, data; miir 225 dev/ic/mtd8xx.c miir = (CSR_READ_4(MTD_MIIMGT) & ~MIIMGT_MASK) | MIIMGT_WRITE | miir 229 dev/ic/mtd8xx.c miir &= ~MIIMGT_MDC; miir 230 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 231 dev/ic/mtd8xx.c miir |= MIIMGT_MDC; miir 232 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 238 dev/ic/mtd8xx.c miir &= ~(MIIMGT_MDC | MIIMGT_MDO); miir 240 dev/ic/mtd8xx.c miir |= MIIMGT_MDO; miir 241 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 242 dev/ic/mtd8xx.c miir |= MIIMGT_MDC; miir 243 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 247 dev/ic/mtd8xx.c miir &= ~MIIMGT_WRITE; miir 249 dev/ic/mtd8xx.c return (miir); miir 262 dev/ic/mtd8xx.c u_int32_t miir, mask, data; miir 264 dev/ic/mtd8xx.c miir = mtd_mii_command(sc, MII_OPCODE_RD, phy, reg); miir 266 dev/ic/mtd8xx.c miir &= ~MIIMGT_MDC; miir 267 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 268 dev/ic/mtd8xx.c miir = CSR_READ_4(MTD_MIIMGT); miir 269 dev/ic/mtd8xx.c if (miir & MIIMGT_MDI) miir 271 dev/ic/mtd8xx.c miir |= MIIMGT_MDC; miir 272 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 275 dev/ic/mtd8xx.c miir &= ~MIIMGT_MDC; miir 276 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 292 dev/ic/mtd8xx.c u_int32_t miir, mask; miir 294 dev/ic/mtd8xx.c miir = mtd_mii_command(sc, MII_OPCODE_WR, phy, reg); miir 296 dev/ic/mtd8xx.c miir &= ~(MIIMGT_MDC | MIIMGT_MDO); miir 298 dev/ic/mtd8xx.c miir |= MIIMGT_MDO; miir 299 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 300 dev/ic/mtd8xx.c miir |= MIIMGT_MDC; miir 301 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir); miir 304 dev/ic/mtd8xx.c miir &= ~MIIMGT_MDC; miir 305 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_MIIMGT, miir);