idetim           2225 dev/pci/pciide.c 	u_int32_t idetim;
idetim           2307 dev/pci/pciide.c 		idetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
idetim           2308 dev/pci/pciide.c 		if ((PIIX_IDETIM_READ(idetim, channel) &
idetim           2322 dev/pci/pciide.c 			idetim = PIIX_IDETIM_CLEAR(idetim, PIIX_IDETIM_IDE,
idetim           2325 dev/pci/pciide.c 			    idetim);
idetim           2453 dev/pci/pciide.c 	u_int32_t oidetim, idetim, idedma_ctl;
idetim           2459 dev/pci/pciide.c 	idetim = PIIX_IDETIM_CLEAR(oidetim, 0xffff, chp->channel);
idetim           2463 dev/pci/pciide.c 	idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE,
idetim           2523 dev/pci/pciide.c 			idetim |= piix_setup_idetim_timings(
idetim           2530 dev/pci/pciide.c 		idetim |= piix_setup_idetim_timings(
idetim           2533 dev/pci/pciide.c 		idetim |= piix_setup_idetim_timings(
idetim           2543 dev/pci/pciide.c 		idetim |= piix_setup_idetim_drvs(&drvp[drive]);
idetim           2553 dev/pci/pciide.c 	pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);
idetim           2561 dev/pci/pciide.c 	u_int32_t oidetim, idetim, sidetim, udmareg, ideconf, idedma_ctl;
idetim           2571 dev/pci/pciide.c 	idetim = PIIX_IDETIM_CLEAR(oidetim, 0xffff, channel);
idetim           2580 dev/pci/pciide.c 	idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, channel);
idetim           2667 dev/pci/pciide.c 				idetim |= piix_setup_idetim_timings(
idetim           2672 dev/pci/pciide.c 				idetim =PIIX_IDETIM_SET(idetim,
idetim           2679 dev/pci/pciide.c 		idetim |= piix_setup_idetim_drvs(drvp);
idetim           2681 dev/pci/pciide.c 			idetim |= piix_setup_idetim_timings(
idetim           2686 dev/pci/pciide.c 			idetim =PIIX_IDETIM_SET(idetim,
idetim           2696 dev/pci/pciide.c 	pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);