ee 159 crypto/rmd160.c u_int32_t a, b, c, d, e, aa, bb, cc, dd, ee, t, x[16];
ee 266 crypto/rmd160.c aa = a ; bb = b; cc = c; dd = d; ee = e;
ee 362 crypto/rmd160.c state[2] = state[3] + ee + a;
ee 420 dev/ic/ar5211.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 544 dev/ic/ar5211.c AR5K_AR5211_PHY_FC_TX_CLIP, ee->ee_tx_clip);
ee 547 dev/ic/ar5211.c AR5K_AR5211_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]));
ee 550 dev/ic/ar5211.c (ee->ee_switch_settling[ee_mode] << 7) & 0x3f80, 0xffffc07f);
ee 552 dev/ic/ar5211.c (ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000, 0xfffc0fff);
ee 554 dev/ic/ar5211.c (ee->ee_adc_desired_size[ee_mode] & 0x00ff) |
ee 555 dev/ic/ar5211.c ((ee->ee_pga_desired_size[ee_mode] << 8) & 0xff00), 0xffff0000);
ee 558 dev/ic/ar5211.c (ee->ee_tx_end2xpa_disable[ee_mode] << 24) |
ee 559 dev/ic/ar5211.c (ee->ee_tx_end2xpa_disable[ee_mode] << 16) |
ee 560 dev/ic/ar5211.c (ee->ee_tx_frm2xpa_enable[ee_mode] << 8) |
ee 561 dev/ic/ar5211.c (ee->ee_tx_frm2xpa_enable[ee_mode]));
ee 564 dev/ic/ar5211.c ee->ee_tx_end2xlna_enable[ee_mode] << 8, 0xffff00ff);
ee 566 dev/ic/ar5211.c (ee->ee_thr_62[ee_mode] << 12) & 0x7f000, 0xfff80fff);
ee 571 dev/ic/ar5211.c (ee->ee_i_cal[ee_mode] << AR5K_AR5211_PHY_IQ_CORR_Q_I_COFF_S) |
ee 572 dev/ic/ar5211.c ee->ee_q_cal[ee_mode]);
ee 2522 dev/ic/ar5211.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 2532 dev/ic/ar5211.c ob = ar5k_bitswap(ee->ee_ob[ee_mode][0], 3);
ee 2533 dev/ic/ar5211.c db = ar5k_bitswap(ee->ee_db[ee_mode][0], 3);
ee 2549 dev/ic/ar5211.c ob = ee->ee_ob[ee_mode][obdb];
ee 2550 dev/ic/ar5211.c db = ee->ee_db[ee_mode][obdb];
ee 2551 dev/ic/ar5211.c x_gain = ee->ee_x_gain[ee_mode];
ee 2552 dev/ic/ar5211.c xpds = ee->ee_xpd[ee_mode];
ee 437 dev/ic/ar5212.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 676 dev/ic/ar5212.c AR5K_AR5212_PHY_FC_TX_CLIP, ee->ee_tx_clip);
ee 679 dev/ic/ar5212.c AR5K_AR5212_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]));
ee 682 dev/ic/ar5212.c (ee->ee_switch_settling[ee_mode] << 7) & 0x3f80, 0xffffc07f);
ee 684 dev/ic/ar5212.c (ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000, 0xfffc0fff);
ee 686 dev/ic/ar5212.c (ee->ee_adc_desired_size[ee_mode] & 0x00ff) |
ee 687 dev/ic/ar5212.c ((ee->ee_pga_desired_size[ee_mode] << 8) & 0xff00), 0xffff0000);
ee 690 dev/ic/ar5212.c (ee->ee_tx_end2xpa_disable[ee_mode] << 24) |
ee 691 dev/ic/ar5212.c (ee->ee_tx_end2xpa_disable[ee_mode] << 16) |
ee 692 dev/ic/ar5212.c (ee->ee_tx_frm2xpa_enable[ee_mode] << 8) |
ee 693 dev/ic/ar5212.c (ee->ee_tx_frm2xpa_enable[ee_mode]));
ee 696 dev/ic/ar5212.c ee->ee_tx_end2xlna_enable[ee_mode] << 8, 0xffff00ff);
ee 698 dev/ic/ar5212.c (ee->ee_thr_62[ee_mode] << 12) & 0x7f000, 0xfff80fff);
ee 703 dev/ic/ar5212.c (ee->ee_i_cal[ee_mode] << AR5K_AR5212_PHY_IQ_CORR_Q_I_COFF_S) |
ee 704 dev/ic/ar5212.c ee->ee_q_cal[ee_mode]);
ee 709 dev/ic/ar5212.c ee->ee_margin_tx_rx[ee_mode]);
ee 721 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 727 dev/ic/ar5xxx.c ee->ee_switch_settling[mode] = (val >> 8) & 0x7f;
ee 728 dev/ic/ar5xxx.c ee->ee_ant_tx_rx[mode] = (val >> 2) & 0x3f;
ee 729 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i] = (val << 4) & 0x3f;
ee 732 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] |= (val >> 12) & 0xf;
ee 733 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f;
ee 734 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = val & 0x3f;
ee 737 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 10) & 0x3f;
ee 738 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 4) & 0x3f;
ee 739 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i] = (val << 2) & 0x3f;
ee 742 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] |= (val >> 14) & 0x3;
ee 743 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 8) & 0x3f;
ee 744 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 2) & 0x3f;
ee 745 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i] = (val << 4) & 0x3f;
ee 748 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] |= (val >> 12) & 0xf;
ee 749 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f;
ee 750 dev/ic/ar5xxx.c ee->ee_ant_control[mode][i++] = val & 0x3f;
ee 754 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][0] << 4) | 0x1;
ee 756 dev/ic/ar5xxx.c ee->ee_ant_control[mode][1] |
ee 757 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][2] << 6) |
ee 758 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][3] << 12) |
ee 759 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][4] << 18) |
ee 760 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][5] << 24);
ee 762 dev/ic/ar5xxx.c ee->ee_ant_control[mode][6] |
ee 763 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][7] << 6) |
ee 764 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][8] << 12) |
ee 765 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][9] << 18) |
ee 766 dev/ic/ar5xxx.c (ee->ee_ant_control[mode][10] << 24);
ee 777 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 783 dev/ic/ar5xxx.c ee->ee_tx_end2xlna_enable[mode] = (val >> 8) & 0xff;
ee 784 dev/ic/ar5xxx.c ee->ee_thr_62[mode] = val & 0xff;
ee 787 dev/ic/ar5xxx.c ee->ee_thr_62[mode] =
ee 791 dev/ic/ar5xxx.c ee->ee_tx_end2xpa_disable[mode] = (val >> 8) & 0xff;
ee 792 dev/ic/ar5xxx.c ee->ee_tx_frm2xpa_enable[mode] = val & 0xff;
ee 795 dev/ic/ar5xxx.c ee->ee_pga_desired_size[mode] = (val >> 8) & 0xff;
ee 798 dev/ic/ar5xxx.c ee->ee_noise_floor_thr[mode] = -((((val & 0xff) ^ 0xff)) + 1);
ee 800 dev/ic/ar5xxx.c ee->ee_noise_floor_thr[mode] = val & 0xff;
ee 803 dev/ic/ar5xxx.c ee->ee_noise_floor_thr[mode] =
ee 807 dev/ic/ar5xxx.c ee->ee_xlna_gain[mode] = (val >> 5) & 0xff;
ee 808 dev/ic/ar5xxx.c ee->ee_x_gain[mode] = (val >> 1) & 0xf;
ee 809 dev/ic/ar5xxx.c ee->ee_xpd[mode] = val & 0x1;
ee 812 dev/ic/ar5xxx.c ee->ee_fixed_bias[mode] = (val >> 13) & 0x1;
ee 816 dev/ic/ar5xxx.c ee->ee_false_detect[mode] = (val >> 6) & 0x7f;
ee 819 dev/ic/ar5xxx.c ee->ee_xr_power[mode] = val & 0x3f;
ee 821 dev/ic/ar5xxx.c ee->ee_ob[mode][0] = val & 0x7;
ee 822 dev/ic/ar5xxx.c ee->ee_db[mode][0] = (val >> 3) & 0x7;
ee 827 dev/ic/ar5xxx.c ee->ee_i_gain[mode] = AR5K_EEPROM_I_GAIN;
ee 828 dev/ic/ar5xxx.c ee->ee_cck_ofdm_power_delta = AR5K_EEPROM_CCK_OFDM_DELTA;
ee 830 dev/ic/ar5xxx.c ee->ee_i_gain[mode] = (val >> 13) & 0x7;
ee 833 dev/ic/ar5xxx.c ee->ee_i_gain[mode] |= (val << 3) & 0x38;
ee 836 dev/ic/ar5xxx.c ee->ee_cck_ofdm_power_delta = (val >> 3) & 0xff;
ee 841 dev/ic/ar5xxx.c ee->ee_i_cal[mode] = (val >> 8) & 0x3f;
ee 842 dev/ic/ar5xxx.c ee->ee_q_cal[mode] = (val >> 3) & 0x1f;
ee 847 dev/ic/ar5xxx.c ee->ee_scaled_cck_delta = (val >> 11) & 0x1f;
ee 858 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 865 dev/ic/ar5xxx.c ee->ee_tx_clip = 4;
ee 866 dev/ic/ar5xxx.c ee->ee_pwd_84 = ee->ee_pwd_90 = 1;
ee 867 dev/ic/ar5xxx.c ee->ee_gain_select = 1;
ee 907 dev/ic/ar5xxx.c ee->ee_ob[AR5K_EEPROM_MODE_11B][0] = val & 0x7;
ee 908 dev/ic/ar5xxx.c ee->ee_db[AR5K_EEPROM_MODE_11B][0] = (val >> 3) & 0x7;
ee 911 dev/ic/ar5xxx.c ee->ee_ob[AR5K_EEPROM_MODE_11G][0] = val & 0x7;
ee 912 dev/ic/ar5xxx.c ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7;
ee 919 dev/ic/ar5xxx.c ee->ee_ctls = AR5K_EEPROM_N_CTLS(hal->ah_ee_version);
ee 921 dev/ic/ar5xxx.c for (i = 0; i < ee->ee_ctls; i++) {
ee 923 dev/ic/ar5xxx.c ee->ee_ctl[i] = (val >> 8) & 0xff;
ee 924 dev/ic/ar5xxx.c ee->ee_ctl[i + 1] = val & 0xff;
ee 932 dev/ic/ar5xxx.c ee->ee_turbo_max_power[mode] =
ee 933 dev/ic/ar5xxx.c AR5K_EEPROM_HDR_T_5GHZ_DBM(ee->ee_header);
ee 941 dev/ic/ar5xxx.c ee->ee_adc_desired_size[mode] = (int8_t)((val >> 8) & 0xff);
ee 942 dev/ic/ar5xxx.c ee->ee_ob[mode][3] = (val >> 5) & 0x7;
ee 943 dev/ic/ar5xxx.c ee->ee_db[mode][3] = (val >> 2) & 0x7;
ee 944 dev/ic/ar5xxx.c ee->ee_ob[mode][2] = (val << 1) & 0x7;
ee 947 dev/ic/ar5xxx.c ee->ee_ob[mode][2] |= (val >> 15) & 0x1;
ee 948 dev/ic/ar5xxx.c ee->ee_db[mode][2] = (val >> 12) & 0x7;
ee 949 dev/ic/ar5xxx.c ee->ee_ob[mode][1] = (val >> 9) & 0x7;
ee 950 dev/ic/ar5xxx.c ee->ee_db[mode][1] = (val >> 6) & 0x7;
ee 951 dev/ic/ar5xxx.c ee->ee_ob[mode][0] = (val >> 3) & 0x7;
ee 952 dev/ic/ar5xxx.c ee->ee_db[mode][0] = val & 0x7;
ee 959 dev/ic/ar5xxx.c ee->ee_margin_tx_rx[mode] = val & 0x3f;
ee 972 dev/ic/ar5xxx.c ee->ee_adc_desired_size[mode] = (int8_t)((val >> 8) & 0xff);
ee 973 dev/ic/ar5xxx.c ee->ee_ob[mode][1] = (val >> 4) & 0x7;
ee 974 dev/ic/ar5xxx.c ee->ee_db[mode][1] = val & 0x7;
ee 981 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][0] =
ee 983 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][1] =
ee 987 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][2] =
ee 992 dev/ic/ar5xxx.c ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f;
ee 1005 dev/ic/ar5xxx.c ee->ee_adc_desired_size[mode] = (int8_t)((val >> 8) & 0xff);
ee 1006 dev/ic/ar5xxx.c ee->ee_ob[mode][1] = (val >> 4) & 0x7;
ee 1007 dev/ic/ar5xxx.c ee->ee_db[mode][1] = val & 0x7;
ee 1014 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][0] =
ee 1016 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][1] =
ee 1020 dev/ic/ar5xxx.c ee->ee_turbo_max_power[mode] = val & 0x7f;
ee 1021 dev/ic/ar5xxx.c ee->ee_xr_power[mode] = (val >> 7) & 0x3f;
ee 1024 dev/ic/ar5xxx.c ee->ee_cal_pier[mode][2] =
ee 1028 dev/ic/ar5xxx.c ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f;
ee 1032 dev/ic/ar5xxx.c ee->ee_i_cal[mode] = (val >> 8) & 0x3f;
ee 1033 dev/ic/ar5xxx.c ee->ee_q_cal[mode] = (val >> 3) & 0x1f;
ee 1037 dev/ic/ar5xxx.c ee->ee_cck_ofdm_gain_delta = val & 0xff;
ee 1518 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 1552 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 119, 0, AH_TRUE))
ee 1556 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 122, 0, AH_TRUE))
ee 1569 dev/ic/ar5xxx.c ee->ee_pwd_84, 1, 51, 3, AH_TRUE))
ee 1573 dev/ic/ar5xxx.c ee->ee_pwd_90, 1, 45, 3, AH_TRUE))
ee 1578 dev/ic/ar5xxx.c !ee->ee_xpd[ee_mode], 1, 95, 0, AH_TRUE))
ee 1582 dev/ic/ar5xxx.c ee->ee_x_gain[ee_mode], 4, 96, 0, AH_TRUE))
ee 1586 dev/ic/ar5xxx.c obdb >= 0 ? ee->ee_ob[ee_mode][obdb] : 0, 3, 104, 0, AH_TRUE))
ee 1590 dev/ic/ar5xxx.c obdb >= 0 ? ee->ee_db[ee_mode][obdb] : 0, 3, 107, 0, AH_TRUE))
ee 1594 dev/ic/ar5xxx.c ee->ee_i_gain[ee_mode], 6, 29, 0, AH_TRUE))
ee 1598 dev/ic/ar5xxx.c ee->ee_xpd[ee_mode], 1, 4, 0, AH_TRUE))
ee 1613 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ee 1656 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 287, 0, AH_TRUE))
ee 1660 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 290, 0, AH_TRUE))
ee 1671 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 279, 0, AH_TRUE))
ee 1675 dev/ic/ar5xxx.c ee->ee_ob[ee_mode][obdb], 3, 282, 0, AH_TRUE))
ee 1681 dev/ic/ar5xxx.c ee->ee_x_gain[ee_mode], 2, 270, 0, AH_TRUE);
ee 1683 dev/ic/ar5xxx.c ee->ee_x_gain[ee_mode], 2, 257, 0, AH_TRUE);
ee 1687 dev/ic/ar5xxx.c ee->ee_xpd[ee_mode], 1, 302, 0, AH_TRUE))
ee 1691 dev/ic/ar5xxx.c ee->ee_i_gain[ee_mode], 6, 14, 0, AH_TRUE))