dma_status        420 dev/ata/ata_wdc.c 		if (chp->wdc->dma_status != 0) {
dma_status       1134 dev/atapiscsi/atapiscsi.c 		chp->wdc->dma_status =
dma_status       1139 dev/atapiscsi/atapiscsi.c 		if (chp->wdc->dma_status & WDC_DMAST_UNDER)
dma_status       1194 dev/atapiscsi/atapiscsi.c 	    (chp->wdc->dma_status & ~WDC_DMAST_UNDER)) {
dma_status       1002 dev/ic/wdc.c   		chp->wdc->dma_status =
dma_status       1005 dev/ic/wdc.c   		if (chp->wdc->dma_status & WDC_DMAST_NOIRQ) {
dma_status       1202 dev/ic/wdc.c   		chp->wdc->dma_status =
dma_status       1205 dev/ic/wdc.c   		if ((chp->wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
dma_status       1210 dev/ic/wdc.c   	chp->wdc->dma_status = (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
dma_status       1241 dev/ic/wdc.c   			chp->wdc->dma_status =
dma_status        197 dev/ic/wdcvar.h 	int             dma_status; /* status return from dma_finish() */
dma_status        135 dev/pci/if_san_xilinx.c 	unsigned char	dma_status;
dma_status       1763 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&sc->dma_status, TX_BUSY)) {
dma_status       1770 dev/pci/if_san_xilinx.c 	bit_set((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1809 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1816 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1828 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1837 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1846 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1857 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1946 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       1985 dev/pci/if_san_xilinx.c 	bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       3132 dev/pci/if_san_xilinx.c 		bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status       3232 dev/pci/if_san_xilinx.c 	bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
dma_status        728 dev/pci/ises.c 	u_int32_t ints, dma_status, cmd; 
dma_status        731 dev/pci/ises.c 	dma_status = READ_REG(sc, ISES_DMA_STATUS);
dma_status        733 dev/pci/ises.c 	if (!(dma_status & (ISES_DMA_STATUS_R_ERR | ISES_DMA_STATUS_W_ERR))) {
dma_status        735 dev/pci/ises.c 		    (dma_status & ISES_DMA_STATUS_R_RUN) == 0) {
dma_status        746 dev/pci/ises.c 		    (dma_status & ISES_DMA_STATUS_W_RUN) == 0) {
dma_status        833 dev/pci/ises.c 	u_int32_t dma_status;
dma_status        900 dev/pci/ises.c 	dma_status = READ_REG(sc, ISES_DMA_STATUS);
dma_status        901 dev/pci/ises.c 	dma_status |= ISES_DMA_CTRL_ILT | ISES_DMA_CTRL_RLINE;
dma_status        902 dev/pci/ises.c 	WRITE_REG(sc, ISES_DMA_CTRL, dma_status);
dma_status       1749 dev/pci/ises.c 	u_int32_t dma_status;
dma_status       1757 dev/pci/ises.c 	dma_status = READ_REG(sc, ISES_DMA_STATUS);
dma_status       1758 dev/pci/ises.c 	dma_status |= ISES_DMA_CTRL_ILT | ISES_DMA_CTRL_WRITE;
dma_status       1759 dev/pci/ises.c 	WRITE_REG(sc, ISES_DMA_CTRL, dma_status);