div 2746 arch/i386/i386/machdep.c extern int IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
div 2876 arch/i386/i386/machdep.c setgate(&idt[ 0], &IDTVEC(div), 0, SDT_SYS386TGT, SEL_KPL, GCODE_SEL);
div 941 dev/pci/eap.c u_int32_t div;
div 1024 dev/pci/eap.c div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS;
div 1032 dev/pci/eap.c div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ /
div 1035 dev/pci/eap.c div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ /
div 1037 dev/pci/eap.c div |= EAP_CCB_INTRM;
div 1038 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, div);
div 1039 dev/pci/eap.c DPRINTFN(2, ("eap_set_params: set ICSC = 0x%08x\n", div));
div 182 dev/pci/viaenv.c val_to_rpm(unsigned int val, int div)
div 188 dev/pci/viaenv.c return 1350000 / val / div;
div 3139 dev/pcmcia/if_ray.c hexdump(const u_int8_t *d, int len, int br, int div, int fl)
div 3143 dev/pcmcia/if_ray.c sp = br / div;
div 3197 dev/pcmcia/if_ray.c nj = (div - j - 1) % div;
div 447 dev/sdmmc/sdhc.c int div;
div 449 dev/sdmmc/sdhc.c for (div = 1; div <= 256; div *= 2)
div 450 dev/sdmmc/sdhc.c if ((hp->clkbase / div) <= freq)
div 451 dev/sdmmc/sdhc.c return (div / 2);
div 465 dev/sdmmc/sdhc.c int div;
div 488 dev/sdmmc/sdhc.c if ((div = sdhc_clock_divisor(hp, freq)) < 0) {
div 493 dev/sdmmc/sdhc.c HWRITE2(hp, SDHC_CLOCK_CTL, div << SDHC_SDCLK_DIV_SHIFT);
div 385 kern/tty_nmea.c long fac = 36000L, div = 6L, secs = 0L, frac = 0L;
div 391 kern/tty_nmea.c div = 16 - div;
div 392 kern/tty_nmea.c fac /= div;
div 414 kern/tty_nmea.c div = 1L;
div 416 kern/tty_nmea.c for (++s; div < 1000000 && *s && *s >= '0' && *s <= '9'; s++) {
div 419 kern/tty_nmea.c div *= 10;
div 426 kern/tty_nmea.c *nano = secs * 1000000000LL + (int64_t)frac * (1000000000 / div);