current_desc     2501 dev/pci/if_em.c 	struct em_rx_desc   *current_desc;
current_desc     2506 dev/pci/if_em.c 	current_desc = &sc->rx_desc_base[i];
current_desc     2510 dev/pci/if_em.c 	if (!((current_desc->status) & E1000_RXD_STAT_DD))
current_desc     2513 dev/pci/if_em.c 	while ((current_desc->status & E1000_RXD_STAT_DD) &&
current_desc     2529 dev/pci/if_em.c 		desc_len = letoh16(current_desc->length);
current_desc     2530 dev/pci/if_em.c 		status = current_desc->status;
current_desc     2544 dev/pci/if_em.c 		if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
current_desc     2552 dev/pci/if_em.c 			if (TBI_ACCEPT(&sc->hw, status, current_desc->errors,
current_desc     2645 dev/pci/if_em.c 				em_receive_checksum(sc, current_desc,
current_desc     2670 dev/pci/if_em.c 		current_desc->status = 0;
current_desc     2694 dev/pci/if_em.c 		current_desc = &sc->rx_desc_base[i];
current_desc     1751 dev/pci/if_ixgb.c 	struct ixgb_rx_desc *current_desc;
current_desc     1757 dev/pci/if_ixgb.c 	current_desc = &sc->rx_desc_base[i];
current_desc     1761 dev/pci/if_ixgb.c 	if (!((current_desc->status) & IXGB_RX_DESC_STATUS_DD))
current_desc     1764 dev/pci/if_ixgb.c 	while ((current_desc->status & IXGB_RX_DESC_STATUS_DD) &&
current_desc     1775 dev/pci/if_ixgb.c 		if (current_desc->status & IXGB_RX_DESC_STATUS_EOP) {
current_desc     1781 dev/pci/if_ixgb.c 		len = current_desc->length;
current_desc     1783 dev/pci/if_ixgb.c 		if (current_desc->errors & (IXGB_RX_DESC_ERRORS_CE |
current_desc     1819 dev/pci/if_ixgb.c 				ixgb_receive_checksum(sc, current_desc,
current_desc     1835 dev/pci/if_ixgb.c 		current_desc->status = 0;
current_desc     1843 dev/pci/if_ixgb.c 			current_desc = sc->rx_desc_base;
current_desc     1845 dev/pci/if_ixgb.c 			current_desc++;
current_desc     1871 dev/pci/if_ixgb.c 		current_desc = &sc->rx_desc_base[next_to_use];
current_desc     1872 dev/pci/if_ixgb.c 		if ((current_desc->errors & (IXGB_RX_DESC_ERRORS_CE |