ca_tag 145 dev/cardbus/cardbus.c cardbustag_t tag = ca->ca_tag;
ca_tag 512 dev/cardbus/cardbus.c ca.ca_tag = tag;
ca_tag 326 dev/cardbus/cardbusvar.h cardbustag_t ca_tag;
ca_tag 137 dev/cardbus/ehci_cardbus.c csr = cardbus_conf_read(cc, cf, ca->ca_tag,
ca_tag 139 dev/cardbus/ehci_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
ca_tag 122 dev/cardbus/if_acx_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 148 dev/cardbus/if_ath_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 153 dev/cardbus/if_atw_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 105 dev/cardbus/if_dc_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 125 dev/cardbus/if_dc_cardbus.c sc->dc_cachesize = cardbus_conf_read(cc, cf, ca->ca_tag, DC_PCI_CFLT)
ca_tag 190 dev/cardbus/if_dc_cardbus.c reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
ca_tag 194 dev/cardbus/if_dc_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
ca_tag 97 dev/cardbus/if_malo_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 107 dev/cardbus/if_pgt_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 137 dev/cardbus/if_ral_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 127 dev/cardbus/if_re_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 163 dev/cardbus/if_rl_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 211 dev/cardbus/if_rtw_cardbus.c csc->sc_tag = ca->ca_tag;
ca_tag 240 dev/cardbus/if_xl_cardbus.c command = cardbus_conf_read(cc, cf, ca->ca_tag,
ca_tag 264 dev/cardbus/if_xl_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
ca_tag 270 dev/cardbus/if_xl_cardbus.c bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG);
ca_tag 277 dev/cardbus/if_xl_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG, bhlc);
ca_tag 140 dev/cardbus/ohci_cardbus.c csr = cardbus_conf_read(cc, cf, ca->ca_tag,
ca_tag 142 dev/cardbus/ohci_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
ca_tag 64 dev/cardbus/puc_cardbus.c bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG);
ca_tag 73 dev/cardbus/puc_cardbus.c reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
ca_tag 98 dev/cardbus/puc_cardbus.c reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
ca_tag 111 dev/cardbus/puc_cardbus.c if (!cardbus_mapreg_probe(cc, cf, ca->ca_tag, bar, &type))
ca_tag 125 dev/cardbus/puc_cardbus.c if (cardbus_get_capability(cc, cf, ca->ca_tag, PCI_CAP_PWRMGMT, ®,
ca_tag 127 dev/cardbus/puc_cardbus.c reg = cardbus_conf_read(cc, cf, ca->ca_tag, reg + 4) & 3;
ca_tag 131 dev/cardbus/puc_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, reg + 4, 0);
ca_tag 129 dev/cardbus/uhci_cardbus.c csr = cardbus_conf_read(cc, cf, ca->ca_tag,
ca_tag 131 dev/cardbus/uhci_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
ca_tag 144 dev/cardbus/uhci_cardbus.c cardbus_conf_write(cc, cf, ca->ca_tag, PCI_LEGSUP,
ca_tag 147 dev/cardbus/uhci_cardbus.c switch(cardbus_conf_read(cc, cf, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {