1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57 #ifndef _SCSI_SCSI_DISK_H
58 #define _SCSI_SCSI_DISK_H 1
59
60
61
62
63 #define FORMAT_UNIT 0x04
64 struct scsi_format_unit {
65 u_int8_t opcode;
66 u_int8_t flags;
67 #define SFU_DLF_MASK 0x07
68 #define SFU_CMPLST 0x08
69 #define SFU_FMTDATA 0x10
70 u_int8_t vendor_specific;
71 u_int8_t interleave[2];
72 u_int8_t control;
73 };
74
75
76
77
78
79
80
81
82
83
84 struct scsi_format_unit_defect_list_header {
85 u_int8_t reserved;
86 u_int8_t flags;
87 #define DLH_VS 0x01
88 #define DLH_IMMED 0x02
89 #define DLH_DSP 0x04
90 #define DLH_IP 0x08
91 #define DLH_STPF 0x10
92 #define DLH_DCRT 0x20
93 #define DLH_DPRY 0x40
94 #define DLH_FOV 0x80
95 u_int8_t defect_lst_len[2];
96 };
97
98
99
100
101
102 struct scsi_initialization_pattern_descriptor {
103 u_int8_t ip_modifier;
104 u_int8_t pattern_type;
105 #define IP_TYPE_DEFAULT 0x01
106 #define IP_TYPE_REPEAT 0x01
107
108
109 u_int8_t pattern_length[2];
110 #if 0
111 u_int8_t pattern[...];
112 #endif
113 };
114
115
116
117
118
119
120
121
122 struct scsi_defect_descriptor_bf {
123 u_int8_t block_address[4];
124 };
125
126
127 struct scsi_defect_descriptor_bfif {
128 u_int8_t cylinder[2];
129 u_int8_t head;
130 u_int8_t bytes_from_index[2];
131 };
132
133
134 struct scsi_defect_descriptor_psf {
135 u_int8_t cylinder[2];
136 u_int8_t head;
137 u_int8_t sector[2];
138 };
139
140
141 struct scsi_reassign_blocks {
142 u_int8_t opcode;
143 u_int8_t byte2;
144 u_int8_t unused[3];
145 u_int8_t control;
146 };
147
148
149
150
151 #define REZERO_UNIT 0x01
152 struct scsi_rezero_unit {
153 u_int8_t opcode;
154 u_int8_t byte2;
155 u_int8_t reserved[3];
156 u_int8_t control;
157 };
158
159 struct scsi_rw {
160 u_int8_t opcode;
161 u_int8_t addr[3];
162 #define SRW_TOPADDR 0x1F
163 u_int8_t length;
164 u_int8_t control;
165 };
166
167 struct scsi_rw_big {
168 u_int8_t opcode;
169 u_int8_t byte2;
170 #define SRWB_RELADDR 0x01
171 u_int8_t addr[4];
172 u_int8_t reserved;
173 u_int8_t length[2];
174 u_int8_t control;
175 };
176
177 struct scsi_rw_12 {
178 u_int8_t opcode;
179 u_int8_t byte2;
180 u_int8_t addr[4];
181 u_int8_t length[4];
182 u_int8_t reserved;
183 u_int8_t control;
184 };
185
186 struct scsi_rw_16 {
187 u_int8_t opcode;
188 u_int8_t byte2;
189 u_int8_t addr[8];
190 u_int8_t length[4];
191 u_int8_t reserved;
192 u_int8_t control;
193 };
194
195 struct scsi_read_capacity {
196 u_int8_t opcode;
197 u_int8_t byte2;
198 u_int8_t addr[4];
199 u_int8_t unused[3];
200 u_int8_t control;
201 };
202
203 struct scsi_read_capacity_16 {
204 u_int8_t opcode;
205 u_int8_t byte2;
206 #define SRC16_SERVICE_ACTION 0x10
207 u_int8_t addr[8];
208 u_int8_t length[4];
209 u_int8_t reserved;
210 u_int8_t control;
211 };
212
213 struct scsi_start_stop {
214 u_int8_t opcode;
215 u_int8_t byte2;
216 u_int8_t unused[2];
217 u_int8_t how;
218 #define SSS_STOP 0x00
219 #define SSS_START 0x01
220 #define SSS_LOEJ 0x02
221 u_int8_t control;
222 };
223
224
225
226
227
228 #define SYNCHRONIZE_CACHE 0x35
229 struct scsi_synchronize_cache {
230 u_int8_t opcode;
231 u_int8_t flags;
232 #define SSC_RELADR 0x01
233 #define SSC_IMMED 0x02
234 u_int8_t addr[4];
235 u_int8_t reserved;
236 u_int8_t length[2];
237 u_int8_t control;
238 };
239
240
241
242
243
244
245 #define REASSIGN_BLOCKS 0x07
246 #define READ_COMMAND 0x08
247 #define WRITE_COMMAND 0x0a
248 #define READ_CAPACITY 0x25
249 #define READ_CAPACITY_16 0x9e
250 #define READ_BIG 0x28
251 #define WRITE_BIG 0x2a
252 #define READ_12 0xa8
253 #define WRITE_12 0xaa
254 #define READ_16 0x88
255 #define WRITE_16 0x8a
256 #define SYNCHRONIZE_CACHE 0x35
257
258
259 struct scsi_read_cap_data {
260 u_int8_t addr[4];
261 u_int8_t length[4];
262 };
263
264 struct scsi_read_cap_data_16 {
265 u_int8_t addr[8];
266 u_int8_t length[4];
267 u_int8_t p_type_prot;
268 u_int8_t logical_per_phys;
269 u_int8_t lowest_aligned[2];
270 u_int8_t reserved[16];
271 };
272
273 struct scsi_reassign_blocks_data {
274 u_int8_t reserved[2];
275 u_int8_t length[2];
276 struct {
277 u_int8_t dlbaddr[4];
278 } defect_descriptor[1];
279 };
280
281
282 #define DISK_PGCODE(pg, n) ((pg) != NULL) && (((pg)->pg_code & 0x3f) == n)
283 #define PAGE_DISK_FORMAT 3
284 #define PAGE_RIGID_GEOMETRY 4
285 #define PAGE_FLEX_GEOMETRY 5
286 #define PAGE_REDUCED_GEOMETRY 6
287
288 struct page_disk_format {
289 u_int8_t pg_code;
290 u_int8_t pg_length;
291 u_int8_t trk_z[2];
292 u_int8_t alt_sec[2];
293 u_int8_t alt_trk_z[2];
294 u_int8_t alt_trk_v[2];
295 u_int8_t ph_sec_t[2];
296 u_int8_t bytes_s[2];
297 u_int8_t interleave[2];
298 u_int8_t trk_skew[2];
299 u_int8_t cyl_skew[2];
300 u_int8_t flags;
301 #define DISK_FMT_SURF 0x10
302 #define DISK_FMT_RMB 0x20
303 #define DISK_FMT_HSEC 0x40
304 #define DISK_FMT_SSEC 0x80
305 u_int8_t reserved1;
306 u_int8_t reserved2;
307 u_int8_t reserved3;
308 };
309
310 struct page_rigid_geometry {
311 u_int8_t pg_code;
312 u_int8_t pg_length;
313 u_int8_t ncyl[3];
314 u_int8_t nheads;
315 u_int8_t st_cyl_wp[3];
316 u_int8_t st_cyl_rwc[3];
317 u_int8_t driv_step[2];
318 u_int8_t land_zone[3];
319 u_int8_t sp_sync_ctl;
320 #define SPINDLE_SYNCH_MASK 0x03
321 #define SPINDLE_SYNCH_NONE 0x00
322 #define SPINDLE_SYNCH_SLAVE 0x01
323 #define SPINDLE_SYNCH_MASTER 0x02
324 #define SPINDLE_SYNCH_MCONTROL 0x03
325 u_int8_t rot_offset;
326 u_int8_t reserved1;
327 u_int8_t rpm[2];
328 u_int8_t reserved2;
329 u_int8_t reserved3;
330 };
331
332 struct page_flex_geometry {
333 u_int8_t pg_code;
334 u_int8_t pg_length;
335 u_int8_t xfr_rate[2];
336 u_int8_t nheads;
337 u_int8_t ph_sec_tr;
338 u_int8_t bytes_s[2];
339 u_int8_t ncyl[2];
340 u_int8_t st_cyl_wp[2];
341 u_int8_t st_cyl_rwc[2];
342 u_int8_t driv_step[2];
343 u_int8_t driv_step_w;
344 u_int8_t head_settle[2];
345 u_int8_t motor_on;
346 u_int8_t motor_off;
347 u_int8_t flags;
348 #define MOTOR_ON 0x20
349 #define START_AT_SECTOR_1 0x40
350 #define READY_VALID 0x20
351 u_int8_t step_p_cyl;
352 u_int8_t write_pre;
353 u_int8_t head_load;
354 u_int8_t head_unload;
355 u_int8_t pin_34_2;
356 u_int8_t pin_4_1;
357 u_int8_t rpm[2];
358 u_int8_t reserved1;
359 u_int8_t reserved2;
360 };
361
362 struct page_reduced_geometry {
363 u_int8_t pg_code;
364 u_int8_t pg_length;
365 u_int8_t wcd;
366 u_int8_t bytes_s[2];
367 u_int8_t sectors[5];
368 u_int8_t pow_perf;
369 u_int8_t flags;
370 #define LOCK_DISABLED 0x1
371 #define FORMAT_DISABLED 0x2
372 #define WRITE_DISABLED 0x4
373 #define READ_DISABLED 0x8
374 u_int8_t reserved;
375 };
376 #endif