root/dev/sbus/zxreg.h

INCLUDED FROM

    1 /*      $OpenBSD: zxreg.h,v 1.1 2004/06/20 18:15:25 miod Exp $  */
    2 /*      $NetBSD: zxreg.h,v 1.1 2002/09/13 14:03:53 ad Exp $     */
    4 /*
    5  *  Copyright (c) 2002 The NetBSD Foundation, Inc.
    6  *  All rights reserved.
    7  *
    8  *  This code is derived from software contributed to The NetBSD Foundation
    9  *  by Andrew Doran.
   10  *
   11  *  Redistribution and use in source and binary forms, with or without
   12  *  modification, are permitted provided that the following conditions
   13  *  are met:
   14  *  1. Redistributions of source code must retain the above copyright
   15  *     notice, this list of conditions and the following disclaimer.
   16  *  2. Redistributions in binary form must reproduce the above copyright
   17  *     notice, this list of conditions and the following disclaimer in the
   18  *     documentation and/or other materials provided with the distribution.
   19  *  3. All advertising materials mentioning features or use of this software
   20  *     must display the following acknowledgement:
   21  *         This product includes software developed by the NetBSD
   22  *         Foundation, Inc. and its contributors.
   23  *  4. Neither the name of The NetBSD Foundation nor the names of its
   24  *     contributors may be used to endorse or promote products derived
   25  *     from this software without specific prior written permission.
   26  *
   27  *  THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  *  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  *  PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  *  POSSIBILITY OF SUCH DAMAGE.
   38  */
   40 /*
   41  * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
   42  *
   43  * Permission is hereby granted, free of charge, to any person obtaining a copy
   44  * of this software and associated documentation files (the "Software"), to deal
   45  * in the Software without restriction, including without limitation the rights
   46  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   47  * copies of the Software, and to permit persons to whom the Software is
   48  * furnished to do so, subject to the following conditions:
   49  *
   50  * The above copyright notice and this permission notice shall be included in
   51  * all copies or substantial portions of the Software.
   52  *
   53  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   54  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   55  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
   56  * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
   57  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
   58  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
   59  *
   60  */
   62 #ifndef _DEV_SBUS_ZXREG_H_
   63 #define _DEV_SBUS_ZXREG_H_
   65 /* Hardware offsets. */
   66 #define ZX_OFF_UNK2             0x00000000
   67 #define ZX_OFF_LC_SS0_KRN       0x00200000
   68 #define ZX_OFF_LC_SS0_USR       0x00201000
   69 #define ZX_OFF_LD_SS0           0x00400000
   70 #define ZX_OFF_LD_GBL           0x00401000
   71 #define ZX_OFF_LX_CROSS         0x00600000
   72 #define ZX_OFF_LX_CURSOR        0x00601000
   73 #define ZX_OFF_UNK              0x00602000
   74 #define ZX_OFF_SS0              0x00800000
   75 #define ZX_OFF_LC_SS1_KRN       0x01200000
   76 #define ZX_OFF_LC_SS1_USR       0x01201000
   77 #define ZX_OFF_LD_SS1           0x01400000
   78 #define ZX_OFF_SS1              0x01800000
   80 /* ROP register */
   81 #define ZX_ATTR_PICK_DISABLE    0x00000000
   82 #define ZX_ATTR_PICK_2D         0x80000000
   83 #define ZX_ATTR_PICK_3D         0xa0000000
   84 #define ZX_ATTR_PICK_2D_REND    0xc0000000
   85 #define ZX_ATTR_PICK_3D_REND    0xe0000000
   87 #define ZX_ATTR_DCE_DISABLE     0x00000000
   88 #define ZX_ATTR_DCE_ENABLE      0x10000000
   90 #define ZX_ATTR_APE_DISABLE     0x00000000
   91 #define ZX_ATTR_APE_ENABLE      0x08000000
   93 #define ZX_ATTR_COLOR_VAR       0x00000000
   94 #define ZX_ATTR_COLOR_CONST     0x04000000
   96 #define ZX_ATTR_AA_DISABLE      0x02000000
   97 #define ZX_ATTR_AA_ENABLE       0x01000000
   99 #define ZX_ATTR_ABE_BG          0x00000000      /* dst + alpha * (src - bg) */
  100 #define ZX_ATTR_ABE_FB          0x00800000      /* dst + alpha * (src - dst) */
  102 #define ZX_ATTR_ABE_DISABLE     0x00000000
  103 #define ZX_ATTR_ABE_ENABLE      0x00400000
  105 #define ZX_ATTR_BLTSRC_A        0x00000000
  106 #define ZX_ATTR_BLTSRC_B        0x00200000
  108 #define ZX_ROP_ZERO             (0x0 << 18)
  109 #define ZX_ROP_NEW_AND_OLD      (0x8 << 18)
  110 #define ZX_ROP_NEW_AND_NOLD     (0x4 << 18)
  111 #define ZX_ROP_NEW              (0xc << 18)
  112 #define ZX_ROP_NNEW_AND_OLD     (0x2 << 18)
  113 #define ZX_ROP_OLD              (0xa << 18)
  114 #define ZX_ROP_NEW_XOR_OLD      (0x6 << 18)
  115 #define ZX_ROP_NEW_OR_OLD       (0xe << 18)
  116 #define ZX_ROP_NNEW_AND_NOLD    (0x1 << 18)
  117 #define ZX_ROP_NNEW_XOR_NOLD    (0x9 << 18)
  118 #define ZX_ROP_NOLD             (0x5 << 18)
  119 #define ZX_ROP_NEW_OR_NOLD      (0xd << 18)
  120 #define ZX_ROP_NNEW             (0x3 << 18)
  121 #define ZX_ROP_NNEW_OR_OLD      (0xb << 18)
  122 #define ZX_ROP_NNEW_OR_NOLD     (0x7 << 18)
  123 #define ZX_ROP_ONES             (0xf << 18)
  125 #define ZX_ATTR_HSR_DISABLE     0x00000000
  126 #define ZX_ATTR_HSR_ENABLE      0x00020000
  128 #define ZX_ATTR_WRITEZ_DISABLE  0x00000000
  129 #define ZX_ATTR_WRITEZ_ENABLE   0x00010000
  131 #define ZX_ATTR_Z_VAR           0x00000000
  132 #define ZX_ATTR_Z_CONST         0x00008000
  134 #define ZX_ATTR_WCLIP_DISABLE   0x00000000
  135 #define ZX_ATTR_WCLIP_ENABLE    0x00004000
  137 #define ZX_ATTR_MONO            0x00000000
  138 #define ZX_ATTR_STEREO_LEFT     0x00001000
  139 #define ZX_ATTR_STEREO_RIGHT    0x00003000
  141 #define ZX_ATTR_WE_DISABLE      0x00000000
  142 #define ZX_ATTR_WE_ENABLE       0x00000800
  144 #define ZX_ATTR_FCE_DISABLE     0x00000000
  145 #define ZX_ATTR_FCE_ENABLE      0x00000400
  147 #define ZX_ATTR_RE_DISABLE      0x00000000
  148 #define ZX_ATTR_RE_ENABLE       0x00000200
  150 #define ZX_ATTR_GE_DISABLE      0x00000000
  151 #define ZX_ATTR_GE_ENABLE       0x00000100
  153 #define ZX_ATTR_BE_DISABLE      0x00000000
  154 #define ZX_ATTR_BE_ENABLE       0x00000080
  156 #define ZX_ATTR_RGBE_DISABLE    0x00000000
  157 #define ZX_ATTR_RGBE_ENABLE     0x00000380
  159 #define ZX_ATTR_OE_DISABLE      0x00000000
  160 #define ZX_ATTR_OE_ENABLE       0x00000040
  162 #define ZX_ATTR_ZE_DISABLE      0x00000000
  163 #define ZX_ATTR_ZE_ENABLE       0x00000020
  165 #define ZX_ATTR_FORCE_WID       0x00000010
  167 #define ZX_ATTR_FC_PLANE_MASK   0x0000000e
  169 #define ZX_ATTR_BUFFER_A        0x00000000
  170 #define ZX_ATTR_BUFFER_B        0x00000001
  172 /* CSR */
  173 #define ZX_CSR_BLT_BUSY         0x20000000
  175 struct zx_draw {
u_int32_t       zd_pad0[896];
u_int32_t       zd_csr;
u_int32_t       zd_wid;
u_int32_t       zd_wmask;
u_int32_t       zd_widclip;
u_int32_t       zd_vclipmin;
u_int32_t       zd_vclipmax;
u_int32_t       zd_pickmin;     /* SS1 only */
u_int32_t       zd_pickmax;     /* SS1 only */
u_int32_t       zd_fg;
u_int32_t       zd_bg;
u_int32_t       zd_src;         /* Copy/Scroll (SS0 only) */
u_int32_t       zd_dst;         /* Copy/Scroll/Fill (SS0 only) */
u_int32_t       zd_extent;      /* Copy/Scroll/Fill size (SS0 only) */
u_int32_t       zd_pad1[3];
u_int32_t       zd_setsem;      /* SS1 only */
u_int32_t       zd_clrsem;      /* SS1 only */
u_int32_t       zd_clrpick;     /* SS1 only */
u_int32_t       zd_clrdat;      /* SS1 only */
u_int32_t       zd_alpha;       /* SS1 only */
u_int32_t       zd_pad2[11];
u_int32_t       zd_winbg;
u_int32_t       zd_planemask;
u_int32_t       zd_rop;
u_int32_t       zd_z;
u_int32_t       zd_dczf;        /* SS1 only */
u_int32_t       zd_dczb;        /* SS1 only */
u_int32_t       zd_dcs;         /* SS1 only */
u_int32_t       zd_dczs;        /* SS1 only */
u_int32_t       zd_pickfb;      /* SS1 only */
u_int32_t       zd_pickbb;      /* SS1 only */
u_int32_t       zd_dcfc;        /* SS1 only */
u_int32_t       zd_forcecol;    /* SS1 only */
u_int32_t       zd_door[8];     /* SS1 only */
u_int32_t       zd_pick[5];     /* SS1 only */
  211 };
  213 /* EXTENT */
  214 #define ZX_EXTENT_DIR_FORWARDS  0x00000000
  215 #define ZX_EXTENT_DIR_BACKWARDS 0x80000000
  217 struct zx_draw_ss1 {
u_int32_t       zd_pad0[957];
u_int32_t       zd_misc;
  220 };
  221 #define ZX_SS1_MISC_ENABLE      0x00000001
  222 #define ZX_SS1_MISC_STEREO      0x00000002
  224 #define ZX_ADDRSPC_OBGR         0x00
  225 #define ZX_ADDRSPC_Z            0x01
  226 #define ZX_ADDRSPC_W            0x02
  227 #define ZX_ADDRSPC_FONT_OBGR    0x04
  228 #define ZX_ADDRSPC_FONT_Z       0x05
  229 #define ZX_ADDRSPC_FONT_W       0x06
  230 #define ZX_ADDRSPC_O            0x08
  231 #define ZX_ADDRSPC_B            0x09
  232 #define ZX_ADDRSPC_G            0x0a
  233 #define ZX_ADDRSPC_R            0x0b
  235 struct zx_command {
u_int32_t       zc_csr;
u_int32_t       zc_addrspace;
u_int32_t       zc_fontmsk;
u_int32_t       zc_fontt;
u_int32_t       zc_extent;
u_int32_t       zc_src;
u_int32_t       zc_dst;
u_int32_t       zc_copy;
u_int32_t       zc_fill;
  245 };
  247 #define ZX_CROSS_TYPE_CLUT0     0x00001000
  248 #define ZX_CROSS_TYPE_CLUT1     0x00001001
  249 #define ZX_CROSS_TYPE_CLUT2     0x00001002
  250 #define ZX_CROSS_TYPE_WID       0x00001003
  251 #define ZX_CROSS_TYPE_UNK       0x00001006
  252 #define ZX_CROSS_TYPE_VIDEO     0x00002003
  253 #define ZX_CROSS_TYPE_CLUTDATA  0x00004000
  255 #define ZX_CROSS_CSR_ENABLE     0x00000008
  256 #define ZX_CROSS_CSR_PROGRESS   0x00000004
  257 #define ZX_CROSS_CSR_UNK        0x00000002
  258 #define ZX_CROSS_CSR_UNK2       0x00000001
  260 struct zx_cross {
u_int32_t       zx_type;
u_int32_t       zx_csr;
u_int32_t       zx_value;
  264 };
  266 struct zx_cursor {
u_int32_t       zcu_pad0[4];
u_int32_t       zcu_type;
u_int32_t       zcu_misc;
u_int32_t       zcu_sxy;
u_int32_t       zcu_data;
  272 };
  274 #endif  /* !_DEV_SBUS_ZXREG_H_ */