root/dev/pcmcia/if_rayreg.h

INCLUDED FROM

    1 /*      $OpenBSD: if_rayreg.h,v 1.7 2003/12/12 02:36:07 mcbride Exp $   */
    2 /*      $NetBSD: if_rayreg.h,v 1.3 2000/08/10 11:48:46 ad Exp $ */
    4 /* 
    5  * Copyright (c) 2000 Christian E. Hopps
    6  * All rights reserved.
    7  * 
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  */
   33 #define RAY_MAXSSIDLEN  32
   35 #pragma pack(1)
   37 /*
   38  * CCR registers 
   39  */
   40 #define RAY_COR         (0x00)  /* config option register */
   41 #define RAY_CCSR        (0x01)  /* card config and status register */
   42 #define RAY_PIN         (0x02)  /* not in hw */
   43 #define RAY_SOCKETCOPY  (0x03)  /* not used by hw */
   44 #define RAY_HCSIR       (0x05)  /* HCS intr register */
   45 #define RAY_ECFIR       (0x06)  /* ECF intr register */
   46 #define RAY_AR0         (0x08)  /* authorization register 0 (unused) */
   47 #define RAY_AR1         (0x09)  /* authorization register 1 (unused) */
   48 /*
   49  * XXX these registers cannot be accessed with pcmcia.c's 14 byte mapping
   50  * of the CCR for us
   51  */
   52 #if 0
   53 #define RAY_PMR         0x0a    /* program mode register (unused) */
   54 #define RAY_TMR         0x0b    /* pc test mode register (unused) */
   55 #define RAY_FCWR        0x10    /* frequency control word register */
   56 #define RAY_TMC1        0x14    /* test mode control 1 (unused) */
   57 #define RAY_TMC2        0x15    /* test mode control 1 (unused) */
   58 #define RAY_TMC3        0x16    /* test mode control 1 (unused) */
   59 #define RAY_TMC4        0x17    /* test mode control 1 (unused) */
   60 #endif
   62 /*
   63  * COR register bits
   64  */
   65 #define RAY_COR_CFG_NUM         0x01    /* currently ignored and set */
   66 #define RAY_COR_CFG_MASK        0x3f    /* mask for function */
   67 #define RAY_COR_LEVEL_IRQ       0x40    /* currently ignored and set */
   68 #define RAY_COR_RESET           0x80    /* soft-reset the card */
   70 /*
   71  * CCS register bits
   72  */
   73 /* XXX the linux driver indicates bit 0 is the irq bit */
   74 #define RAY_CCS_IRQ             0x02    /* interrupt pending */
   75 #define RAY_CCS_POWER_DOWN      0x04
   77 /*
   78  * HCSI register bits
   79  *
   80  * the host can only clear this bit.
   81  */
   82 #define RAY_HCSIR_IRQ           0x01    /* indicates an interrupt */
   84 /*
   85  * ECFI register values
   86  */
   87 #define RAY_ECSIR_IRQ           0x01    /* interrupt the card */
   89 /*
   90  * authorization register 0 values
   91  *    -- used for testing/programming the card (unused)
   92  */
   93 #define RAY_AR0_ON              0x57
   95 /*
   96  * authorization register 1 values
   97  *      -- used for testing/programming the card (unused)
   98  */
   99 #define RAY_AR1_ON              0x82
  101 /*
  102  * PMR bits -- these are used to program the card (unused)
  103  */
  104 #define RAY_PMR_PC2PM           0x02    /* grant access to firmware flash */
  105 #define RAY_PMR_PC2CAL          0x10    /* read access to the A/D modem inp */
  106 #define RAY_PMR_MLSE            0x20    /* read access to the MSLE prom */
  108 /*
  109  * TMR bits -- get access to test modes (unused)
  110  */
  111 #define RAY_TMR_TEST            0x08    /* test mode */
  113 /*
  114  * FCWR -- frequency control word, values from [0x02,0xA6] map to
  115  * RF frequency values.
  116  */
  118 /*
  119  * 48k of memory -- would like to map this into smaller isa windows
  120  * but doesn't seem currently possible with the pcmcia code
  121  */
  122 #define RAY_SRAM_MEM_BASE       0
  123 #define RAY_SRAM_MEM_SIZE       0xc000
  125 /*
  126  * offsets into shared ram
  127  */
  128 #define RAY_SCB_BASE            0x0     /* cfg/status/ctl area */
  129 #define RAY_STATUS_BASE         0x0100
  130 #define RAY_HOST_TO_ECF_BASE    0x0200
  131 #define RAY_ECF_TO_HOST_BASE    0x0300
  132 #define RAY_CCS_BASE            0x0400
  133 #define RAY_RCS_BASE            0x0800
  134 #define RAY_APOINT_TIM_BASE     0x0c00
  135 #define RAY_SSID_LIST_BASE      0x0d00
  136 #define RAY_TX_BASE             0x1000
  137 #define RAY_TX_SIZE             0x7000
  138 #define RAY_TX_END              0x8000
  139 #define RAY_RX_BASE             0x8000
  140 #define RAY_RX_END              0xc000
  141 #define RAY_RX_MASK             0x3fff
  143 struct ray_ecf_startup {
u_int8_t        e_status;               /* RAY_ECFS_ */
u_int8_t        e_station_addr[ETHER_ADDR_LEN];
u_int8_t        e_resv0;
u_int8_t        e_rates[8];
u_int8_t        e_japan_callsign[12];
u_int8_t        e_prg_cksum;
u_int8_t        e_cis_cksum;
u_int8_t        e_fw_build_string;
u_int8_t        e_fw_build;
u_int8_t        e_fw_resv;
u_int8_t        e_asic_version;
u_int8_t        e_tib_size;
u_int8_t        e_resv1[29];
  157 };
  159 #define RAY_ECFS_RESERVED0              0x01
  160 #define RAY_ECFS_PROC_SELF_TEST         0x02
  161 #define RAY_ECFS_PROG_MEM_CHECKSUM      0x04
  162 #define RAY_ECFS_DATA_MEM_TEST          0x08
  163 #define RAY_ECFS_RX_CALIBRATION         0x10
  164 #define RAY_ECFS_FW_VERSION_COMPAT      0x20
  165 #define RAY_ECFS_RERSERVED1             0x40
  166 #define RAY_ECFS_TEST_COMPLETE          0x80
  167 #define RAY_ECFS_CARD_OK                RAY_ECFS_TEST_COMPLETE
  169 /* configure/status/control memory */
  170 struct ray_csc {
u_int8_t        csc_mrxo_own;   /* 0 ECF writes, 1 host write */
u_int8_t        csc_mrxc_own;   /* " */
u_int8_t        csc_rxhc_own;   /* " */
u_int8_t        csc_resv;
u_int16_t       csc_mrx_overflow;       /* ECF incs on rx overflow */
u_int16_t       csc_mrx_cksum;  /* " on cksum error */
u_int16_t       csc_rx_hcksum;  /* " on header cksum error */
u_int8_t        csc_rx_noise;           /* average RSL measurement */
  179 };
  181 /* status area */
  182 struct ray_status {
u_int8_t        st_startup_word;
u_int8_t        st_station_addr[ETHER_ADDR_LEN];
u_int8_t        st_calc_prog_cksum;
u_int8_t        st_calc_cis_cksum;
u_int8_t        st_ecf_spare[7];
u_int8_t        st_japan_callsign[12];
  189 };
  191 /*
  192  * Host to ECF data formats
  193  */
  194 struct ray_startup_params_head {
u_int8_t        sp_net_type;    /* 0: ad-hoc 1: infra */
u_int8_t        sp_ap_status;   /* 0: terminal 1: access-point */
u_int8_t        sp_ssid[RAY_MAXSSIDLEN];        /* current SSID */
u_int8_t        sp_scan_mode;   /* 1: active */
u_int8_t        sp_apm_mode;    /* 0: none 1: power-saving */
u_int8_t        sp_mac_addr[ETHER_ADDR_LEN];
u_int8_t        sp_frag_thresh[2];
  202 /*2c*/  u_int8_t        sp_dwell_time[2];
  203 /*2e*/  u_int8_t        sp_beacon_period[2];
  204 /*30*/  u_int8_t        sp_dtim_interval;
  205 /*31*/  u_int8_t        sp_max_retry;   /* number of times to attemp tx */
  206 /*32*/  u_int8_t        sp_ack_timo;
  207 /*33*/  u_int8_t        sp_sifs;
  208 /*34*/  u_int8_t        sp_difs;
  209 /*35*/  u_int8_t        sp_pifs;
  210 /*36*/  u_int8_t        sp_rts_thresh[2];
  211 /*38*/  u_int8_t        sp_scan_dwell[2];
  212 /*3a*/  u_int8_t        sp_scan_max_dwell[2];
  213 /*3c*/  u_int8_t        sp_assoc_timo;
  214 /*3d*/  u_int8_t        sp_adhoc_scan_cycle;
  215 /*3e*/  u_int8_t        sp_infra_scan_cycle;
  216 /*3f*/  u_int8_t        sp_infra_super_scan_cycle;
  217 /*40*/  u_int8_t        sp_promisc;
  218 /*41*/  u_int8_t        sp_uniq_word[2];
  219 /*43*/  u_int8_t        sp_slot_time;
  220 /*44*/  u_int8_t        sp_roam_low_snr_thresh; /* if below this inc count */
  222 /*45*/  u_int8_t        sp_low_snr_count;       /* roam after cnt below thrsh */
  223 /*46*/  u_int8_t        sp_infra_missed_beacon_count;
  224 /*47*/  u_int8_t        sp_adhoc_missed_beacon_count;
  226 /*48*/  u_int8_t        sp_country_code;
  227 /*49*/  u_int8_t        sp_hop_seq;
  228 /*4a*/  u_int8_t        sp_hop_seq_len; /* no longer supported */
  229 };
  231 /* build 5 tail to the startup params */
  232 struct ray_startup_params_tail_5 {
u_int8_t        sp_cw_max[2];
u_int8_t        sp_cw_min[2];
u_int8_t        sp_noise_filter_gain;
u_int8_t        sp_noise_limit_offset;
u_int8_t        sp_rssi_thresh_offset;
u_int8_t        sp_busy_thresh_offset;
u_int8_t        sp_sync_thresh;
u_int8_t        sp_test_mode;
u_int8_t        sp_test_min_chan;
u_int8_t        sp_test_max_chan;
u_int8_t        sp_allow_probe_resp;
u_int8_t        sp_privacy_must_start;
u_int8_t        sp_privacy_can_join;
u_int8_t        sp_basic_rate_set[8];
  247 };
  249 /* build 4 (webgear) tail to the startup params */
  250 struct ray_startup_params_tail_4 {
  251 /*4b*/  u_int8_t        sp_cw_max;              /* 2 bytes in build 5 */
  252 /*4c*/  u_int8_t        sp_cw_min;              /* 2 bytes in build 5 */
  253 /*4e*/  u_int8_t        sp_noise_filter_gain;
  254 /*4f*/  u_int8_t        sp_noise_limit_offset;
u_int8_t        sp_rssi_thresh_offset;
u_int8_t        sp_busy_thresh_offset;
u_int8_t        sp_sync_thresh;
u_int8_t        sp_test_mode;
u_int8_t        sp_test_min_chan;
u_int8_t        sp_test_max_chan;
  261         /* more bytes in build 5 */
  262 };
  264 /*
  265  * Parameter IDs for the update/report param commands and values if
  266  * relevant
  267  */
  268 #define RAY_PID_NET_TYPE                0
  269 #define RAY_PID_AP_STATUS               1
  270 #define RAY_PID_SSID                    2
  271 #define RAY_PID_SCAN_MODE               3
  272 #define RAY_PID_APM_MODE                4
  273 #define RAY_PID_MAC_ADDR                5
  274 #define RAY_PID_FRAG_THRESH             6
  275 #define RAY_PID_DWELL_TIME              7
  276 #define RAY_PID_BEACON_PERIOD           8
  277 #define RAY_PID_DTIM_INT                9
  278 #define RAY_PID_MAX_RETRY               10
  279 #define RAY_PID_ACK_TIMO                11
  280 #define RAY_PID_SIFS                    12
  281 #define RAY_PID_DIFS                    13
  282 #define RAY_PID_PIFS                    14
  283 #define RAY_PID_RTS_THRESH              15
  284 #define RAY_PID_SCAN_DWELL_PERIOD       16
  285 #define RAY_PID_MAX_SCAN_DWELL_PERIOD   17
  286 #define RAY_PID_ASSOC_TIMO              18
  287 #define RAY_PID_ADHOC_SCAN_CYCLE        19
  288 #define RAY_PID_INFRA_SCAN_CYCLE        20
  289 #define RAY_PID_INFRA_SUPER_SCAN_CYCLE  21
  290 #define RAY_PID_PROMISC                 22
  291 #define RAY_PID_UNIQ_WORD               23
  292 #define RAY_PID_SLOT_TIME               24
  293 #define RAY_PID_ROAM_LOW_SNR_THRESH     25
  294 #define RAY_PID_LOW_SNR_COUNT           26
  295 #define RAY_PID_INFRA_MISSED_BEACON_COUNT       27
  296 #define RAY_PID_ADHOC_MISSED_BEACON_COUNT       28
  297 #define RAY_PID_COUNTRY_CODE            29
  298 #define RAY_PID_HOP_SEQ                 30
  299 #define RAY_PID_HOP_SEQ_LEN             31
  300 #define RAY_PID_CW_MAX                  32
  301 #define RAY_PID_CW_MIN                  33
  302 #define RAY_PID_NOISE_FILTER_GAIN       34
  303 #define RAY_PID_NOISE_LIMIT_OFFSET      35
  304 #define RAY_PID_RSSI_THRESH_OFFSET      36
  305 #define RAY_PID_BUSY_THRESH_OFFSET      37
  306 #define RAY_PID_SYNC_THRESH             38
  307 #define RAY_PID_TEST_MODE               39
  308 #define RAY_PID_TEST_MIN_CHAN           40
  309 #define RAY_PID_TEST_MAX_CHAN           41
  310 #define RAY_PID_ALLOW_PROBE_RESP        42
  311 #define RAY_PID_PRIVACY_MUST_START      43
  312 #define RAY_PID_PRIVACY_CAN_JOIN        44
  313 #define RAY_PID_BASIC_RATE_SET          45
  314 #define RAY_PID_MAX                     46
  316 /*
  317  * various values for the above parameters
  318  */
  319 #define RAY_PID_NET_TYPE_ADHOC          0x00
  320 #define RAY_PID_NET_TYPE_INFRA          0x01
  322 #define RAY_PID_AP_STATUS_TERMINAL      0x00    /* not access-point */
  323 #define RAY_PID_AP_STATUS_AP            0x01    /* act as access-point */
  325 #define RAY_PID_SCAN_MODE_PASSIVE       0x00    /* hw doesn't implement */
  326 #define RAY_PID_SCAN_MODE_ACTIVE        0x01
  328 #define RAY_PID_APM_MODE_NONE           0x00    /* no power saving */
  329 #define RAY_PID_APM_MODE_PS             0x01    /* power saving mode */
  331 #define RAY_PID_COUNTRY_CODE_USA        0x1
  332 #define RAY_PID_COUNTRY_CODE_EUROPE     0x2
  333 #define RAY_PID_COUNTRY_CODE_JAPAN      0x3
  334 #define RAY_PID_COUNTRY_CODE_KOREA      0x4
  335 #define RAY_PID_COUNTRY_CODE_SPAIN      0x5
  336 #define RAY_PID_COUNTRY_CODE_FRANCE     0x6
  337 #define RAY_PID_COUNTRY_CODE_ISRAEL     0x7
  338 #define RAY_PID_COUNTRY_CODE_AUSTRALIA  0x8
  339 #define RAY_PID_COUNTRY_CODE_JAPAN_TEST 0x9
  340 #define RAY_PID_COUNTRY_CODE_MAX        0xa
  342 #define RAY_PID_TEST_MODE_NORMAL        0x0
  343 #define RAY_PID_TEST_MODE_ANT_1         0x1
  344 #define RAY_PID_TEST_MODE_ATN_2         0x2
  345 #define RAY_PID_TEST_MODE_ATN_BOTH      0x3
  347 #define RAY_PID_ALLOW_PROBE_RESP_DISALLOW       0x0
  348 #define RAY_PID_ALLOW_PROBE_RESP_ALLOW          0x1
  350 #define RAY_PID_PRIVACY_MUST_START_NOWEP        0x0
  351 #define RAY_PID_PRIVACY_MUST_START_WEP          0x1
  353 #define RAY_PID_PRIVACY_CAN_JOIN_NOWEP          0x0
  354 #define RAY_PID_PRIVACY_CAN_JOIN_WEP            0x1
  355 #define RAY_PID_PRIVACY_CAN_JOIN_DONT_CARE      0x2
  357 #define RAY_PID_BASIC_RATE_500K         1
  358 #define RAY_PID_BASIC_RATE_1000K        2
  359 #define RAY_PID_BASIC_RATE_1500K        3
  360 #define RAY_PID_BASIC_RATE_2000K        4
  362 /*
  363  * System Control Block
  364  */
  365 #define RAY_SCB_CCSI            0x00    /* host CCS index */
  366 #define RAY_SCB_RCCSI           0x01    /* ecf RCCS index */
  368 /*
  369  * command control structures (for CCSR commands)
  370  */
  372 /*
  373  * commands for CCSR
  374  */
  375 #define RAY_CMD_START_PARAMS    0x01    /* download start params */
  376 #define RAY_CMD_UPDATE_PARAMS   0x02    /* update params */
  377 #define RAY_CMD_REPORT_PARAMS   0x03    /* report params */
  378 #define RAY_CMD_UPDATE_MCAST    0x04    /* update mcast list */
  379 #define RAY_CMD_UPDATE_APM      0x05    /* update power saving mode */
  380 #define RAY_CMD_START_NET       0x06
  381 #define RAY_CMD_JOIN_NET        0x07
  382 #define RAY_CMD_START_ASSOC     0x08
  383 #define RAY_CMD_TX_REQ          0x09
  384 #define RAY_CMD_TEST_MEM        0x0a
  385 #define RAY_CMD_SHUTDOWN        0x0b
  386 #define RAY_CMD_DUMP_MEM        0x0c
  387 #define RAY_CMD_START_TIMER     0x0d
  388 #define RAY_CMD_MAX             0x0e
  390 /*
  391  * unsolicited commands from the ECF
  392  */
  393 #define RAY_ECMD_RX_DONE                0x80    /* process rx packet */
  394 #define RAY_ECMD_REJOIN_DONE            0x81    /* rejoined the network */
  395 #define RAY_ECMD_ROAM_START             0x82    /* roaming started */
  396 #define RAY_ECMD_JAPAN_CALL_SIGNAL      0x83    /* japan test thing */
  399 #define RAY_CCS_LINK_NULL       0xff
  400 #define RAY_CCS_SIZE    16
  402 #define RAY_CCS_TX_FIRST        0
  403 #define RAY_CCS_TX_LAST         13
  404 #define RAY_CCS_NTX             (RAY_CCS_TX_LAST - RAY_CCS_TX_FIRST + 1)
  405 #define RAY_TX_BUF_SIZE         2048
  406 #define RAY_CCS_CMD_FIRST       14
  407 #define RAY_CCS_CMD_LAST        63
  408 #define RAY_CCS_NCMD            (RAY_CCS_CMD_LAST - RAY_CCS_CMD_FIRST + 1)
  409 #define RAY_CCS_LAST            63
  411 #define RAY_RCCS_FIRST  64
  412 #define RAY_RCCS_LAST   127
  414 struct ray_cmd {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
  418 };
  420 #define RAY_CCS_STATUS_FREE             0x0
  421 #define RAY_CCS_STATUS_BUSY             0x1
  422 #define RAY_CCS_STATUS_COMPLETE         0x2
  423 #define RAY_CCS_STATUS_FAIL             0x3
  425 /* RAY_CMD_UPDATE_PARAMS */
  426 struct ray_cmd_update {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_paramid;
u_int8_t        c_nparam;
u_int8_t        c_failcause;
  433 };
  435 /* RAY_CMD_REPORT_PARAMS */
  436 struct ray_cmd_report {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_paramid;
u_int8_t        c_nparam;
u_int8_t        c_failcause;
u_int8_t        c_len;
  444 };
  446 /* RAY_CMD_UPDATE_MCAST */
  447 struct ray_cmd_update_mcast {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_nmcast;
  452 };
  454 /* RAY_CMD_UPDATE_APM */
  455 struct ray_cmd_udpate_apm {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_mode;
  460 };
  462 /* RAY_CMD_START_NET and RAY_CMD_JOIN_NET */
  463 struct ray_cmd_net {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_upd_param;
u_int8_t        c_bss_id[ETHER_ADDR_LEN];
u_int8_t        c_inited;
u_int8_t        c_def_txrate;
u_int8_t        c_encrypt;
  472 };
  474 /* parameters passwd in h2e section when c_upd_param is set in ray_cmd_net */
  475 struct ray_net_params {
u_int8_t        p_net_type;
u_int8_t        p_ssid[32];
u_int8_t        p_privacy_must_start;
u_int8_t        p_privacy_can_join;
  480 };
  482 /* RAY_CMD_UPDATE_ASSOC */
  483 struct ray_cmd_update_assoc {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_astatus;
u_int8_t        c_aid[2];
  489 };
  491 /* RAY_CMD_TX_REQ */
  492 struct ray_cmd_tx {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_bufp[2];
u_int8_t        c_len[2];
u_int8_t        c_resv[5];
u_int8_t        c_tx_rate;
u_int8_t        c_apm_mode;
u_int8_t        c_nretry;
u_int8_t        c_antenna;
  503 };
  505 /* RAY_CMD_TX_REQ (for build 4) */
  506 struct ray_cmd_tx_4 {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_bufp[2];
u_int8_t        c_len[2];
u_int8_t        c_addr[ETHER_ADDR_LEN];
u_int8_t        c_apm_mode;
u_int8_t        c_nretry;
u_int8_t        c_antenna;
  516 };
  518 /* RAY_CMD_DUMP_MEM */
  519 struct ray_cmd_dump_mem {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_memtype;
u_int8_t        c_memp[2];
u_int8_t        c_len;
  526 };
  528 /* RAY_CMD_START_TIMER */
  529 struct ray_cmd_start_timer {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_duration[2];
  534 };
  536 struct ray_cmd_rx {
u_int8_t        c_status;       /* ccs generic header */
u_int8_t        c_cmd;          /* " */
u_int8_t        c_link;         /* " */
u_int8_t        c_bufp[2];      /* buffer pointer */
u_int8_t        c_len[2];       /* length */
u_int8_t        c_siglev;       /* signal level */
u_int8_t        c_nextfrag;     /* next fragment in packet */
u_int8_t        c_pktlen[2];    /* total packet length */
u_int8_t        c_antenna;      /* antenna with best reception */
u_int8_t        c_updbss;       /* only 1 for beacon messages */
  547 };
  549 #pragma pack()
  551 #define RAY_TX_PHY_SIZE 0x4
  553 /* this is used by the user to request objects */
  554 struct ray_param_req {
  555         int             r_failcause;
u_int8_t        r_paramid;
u_int8_t        r_len;
u_int8_t        r_data[256];
  559 };
  560 #define RAY_FAILCAUSE_EIDRANGE  1
  561 #define RAY_FAILCAUSE_ELENGTH   2
  562 /* device can possibly return up to 255 */
  563 #define RAY_FAILCAUSE_EDEVSTOP  256
  565 #ifdef _KERNEL
  566 #define RAY_FAILCAUSE_WAITING   257
  567 #endif
  569 /* get a param the data is a ray_param_request structure */
  570 #define SIOCSRAYPARAM   SIOCSIFGENERIC
  571 #define SIOCGRAYPARAM   SIOCGIFGENERIC
  573 #define RAY_PID_STRINGS {                               \
  574         "RAY_PID_NET_TYPE",                             \
  575         "RAY_PID_AP_STATUS",                            \
  576         "RAY_PID_SSID",                                 \
  577         "RAY_PID_SCAN_MODE",                            \
  578         "RAY_PID_APM_MODE",                             \
  579         "RAY_PID_MAC_ADDR",                             \
  580         "RAY_PID_FRAG_THRESH",                          \
  581         "RAY_PID_DWELL_TIME",                           \
  582         "RAY_PID_BEACON_PERIOD",                        \
  583         "RAY_PID_DTIM_INT",                             \
  584         "RAY_PID_MAX_RETRY",                            \
  585         "RAY_PID_ACK_TIMO",                             \
  586         "RAY_PID_SIFS",                                 \
  587         "RAY_PID_DIFS",                                 \
  588         "RAY_PID_PIFS",                                 \
  589         "RAY_PID_RTS_THRESH",                           \
  590         "RAY_PID_SCAN_DWELL_PERIOD",                    \
  591         "RAY_PID_MAX_SCAN_DWELL_PERIOD",                \
  592         "RAY_PID_ASSOC_TIMO",                           \
  593         "RAY_PID_ADHOC_SCAN_CYCLE",                     \
  594         "RAY_PID_INFRA_SCAN_CYCLE",                     \
  595         "RAY_PID_INFRA_SUPER_SCAN_CYCLE",               \
  596         "RAY_PID_PROMISC",                              \
  597         "RAY_PID_UNIQ_WORD",                            \
  598         "RAY_PID_SLOT_TIME",                            \
  599         "RAY_PID_ROAM_LOW_SNR_THRESH",                  \
  600         "RAY_PID_LOW_SNR_COUNT",                        \
  601         "RAY_PID_INFRA_MISSED_BEACON_COUNT",            \
  602         "RAY_PID_ADHOC_MISSED_BEACON_COUNT",            \
  603         "RAY_PID_COUNTRY_CODE",                         \
  604         "RAY_PID_HOP_SEQ",                              \
  605         "RAY_PID_HOP_SEQ_LEN",                          \
  606         "RAY_PID_CW_MAX",                               \
  607         "RAY_PID_CW_MIN",                               \
  608         "RAY_PID_NOISE_FILTER_GAIN",                    \
  609         "RAY_PID_NOISE_LIMIT_OFFSET",                   \
  610         "RAY_PID_RSSI_THRESH_OFFSET",                   \
  611         "RAY_PID_BUSY_THRESH_OFFSET",                   \
  612         "RAY_PID_SYNC_THRESH",                          \
  613         "RAY_PID_TEST_MODE",                            \
  614         "RAY_PID_TEST_MIN_CHAN",                        \
  615         "RAY_PID_TEST_MAX_CHAN",                        \
  616         "RAY_PID_ALLOW_PROBE_RESP",                     \
  617         "RAY_PID_PRIVACY_MUST_START",                   \
  618         "RAY_PID_PRIVACY_CAN_JOIN",                     \
  619         "RAY_PID_BASIC_RATE_SET"                        \
  620     }
  622 #ifdef RAY_DO_SIGLEV
  623 #define SIOCGRAYSIGLEV  _IOWR('i', 201, struct ifreq)
  625 #define RAY_NSIGLEVRECS 8
  626 #define RAY_NSIGLEV 8
  628 struct ray_siglev {
u_int8_t        rsl_host[ETHER_ADDR_LEN]; /* MAC address */
u_int8_t        rsl_siglevs[RAY_NSIGLEV]; /* levels, newest in [0] */
  631         struct timeval  rsl_time;                 /* time of last packet */
  632 };
  633 #endif