1 /* $OpenBSD: pcscpreg.h,v 1.2 2001/02/14 05:11:21 fgsch Exp $ */
2 /* $NetBSD$ */
3
4 /*-
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Izumi Tsutsui.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Am53c974 DMA engine registers
42 */
43
44 #define DMA_CMD 0x40 /* Command */
45 #define DMACMD_RSVD 0xFFFFFF28 /* reserved */
46 #define DMACMD_DIR 0x00000080 /* Transfer Direction (read:1) */
47 #define DMACMD_INTE 0x00000040 /* DMA Interrupt Enable */
48 #define DMACMD_MDL 0x00000010 /* Map to Memory Description List */
49 #define DMACMD_DIAG 0x00000004 /* Diagnostic */
50 #define DMACMD_CMD 0x00000003 /* Command Code Bit */
51 #define DMACMD_IDLE 0x00000000 /* Idle */
52 #define DMACMD_BLAST 0x00000001 /* Blast */
53 #define DMACMD_ABORT 0x00000002 /* Abort */
54 #define DMACMD_START 0x00000003 /* Start */
55
56 #define DMA_STC 0x44 /* Start Transfer Count */
57 #define DMA_SPA 0x48 /* Start Physical Address */
58 #define DMA_WBC 0x4C /* Working Byte Counter */
59 #define DMA_WAC 0x50 /* Working Address Counter */
60
61 #define DMA_STAT 0x54 /* Status Register */
62 #define DMASTAT_RSVD 0xFFFFFF80 /* reserved */
63 #define DMASTAT_PABT 0x00000040 /* PCI master/target Abort */
64 #define DMASTAT_BCMP 0x00000020 /* BLAST Complete */
65 #define DMASTAT_SINT 0x00000010 /* SCSI Interrupt */
66 #define DMASTAT_DONE 0x00000008 /* DMA Transfer Terminated */
67 #define DMASTAT_ABT 0x00000004 /* DMA Transfer Aborted */
68 #define DMASTAT_ERR 0x00000002 /* DMA Transfer Error */
69 #define DMASTAT_PWDN 0x00000001 /* Power Down Indicator */
70
71 #define DMA_SMDLA 0x58 /* Starting Memory Descpritor List Address */
72 #define DMA_WMAC 0x5C /* Working MDL Counter */
73 #define DMA_SBAC 0x70 /* SCSI Bus and Control */