root/dev/pci/auixpreg.h

INCLUDED FROM

DEFINITIONS

1. atiixp_dma_desc_t

    1 /* $OpenBSD: auixpreg.h,v 1.1 2005/08/07 20:08:45 mickey Exp $ */
    2 /* $NetBSD: auixpreg.h,v 1.2 2005/01/12 00:28:03 reinoud Exp $ */
    4 /*
    5  * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org>
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. The name of the author may not be used to endorse or promote products
   14  *    derived from this software without specific prior written permission.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by the NetBSD
   18  *      Foundation, Inc. and its contributors.
   19  * 4. Neither the name of The NetBSD Foundation nor the names of its
   20  *    contributors may be used to endorse or promote products derived
   21  *    from this software without specific prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   28  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   30  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   31  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  */
   36 /*
   37  * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware.
   38  *
   39  * Thanks are due to Takashi Iwai for the constants.
   40  */
   43 #define ATI_IXP_CODECS 3
   46 typedef struct atiixp_dma_desc {
u_int32_t       addr;           /* DMA buffer address */
u_int16_t       status;         /* status bits; function unknown */
u_int16_t       size;           /* size of this DMA packet in dwords */
u_int32_t       next;           /* phys pointer to next packet descriptor */
   51 } __packed atiixp_dma_desc_t;
   54 #define ATI_REG_ISR                     0x00            /* interrupt source */
   55 #define  ATI_REG_ISR_IN_XRUN            (1U<<0)
   56 #define  ATI_REG_ISR_IN_STATUS          (1U<<1)
   57 #define  ATI_REG_ISR_OUT_XRUN           (1U<<2)
   58 #define  ATI_REG_ISR_OUT_STATUS         (1U<<3)
   59 #define  ATI_REG_ISR_SPDF_XRUN          (1U<<4)
   60 #define  ATI_REG_ISR_SPDF_STATUS        (1U<<5)
   61 #define  ATI_REG_ISR_PHYS_INTR          (1U<<8)
   62 #define  ATI_REG_ISR_PHYS_MISMATCH      (1U<<9)
   63 #define  ATI_REG_ISR_CODEC0_NOT_READY   (1U<<10)
   64 #define  ATI_REG_ISR_CODEC1_NOT_READY   (1U<<11)
   65 #define  ATI_REG_ISR_CODEC2_NOT_READY   (1U<<12)
   66 #define  ATI_REG_ISR_NEW_FRAME          (1U<<13)
   68 #define ATI_REG_IER                     0x04            /* interrupt enable */
   69 #define  ATI_REG_IER_IN_XRUN_EN         (1U<<0)
   70 #define  ATI_REG_IER_IO_STATUS_EN       (1U<<1)
   71 #define  ATI_REG_IER_OUT_XRUN_EN        (1U<<2)
   72 #define  ATI_REG_IER_OUT_XRUN_COND      (1U<<3)
   73 #define  ATI_REG_IER_SPDF_XRUN_EN       (1U<<4)
   74 #define  ATI_REG_IER_SPDF_STATUS_EN     (1U<<5)
   75 #define  ATI_REG_IER_PHYS_INTR_EN       (1U<<8)
   76 #define  ATI_REG_IER_PHYS_MISMATCH_EN   (1U<<9)
   77 #define  ATI_REG_IER_CODEC0_INTR_EN     (1U<<10)
   78 #define  ATI_REG_IER_CODEC1_INTR_EN     (1U<<11)
   79 #define  ATI_REG_IER_CODEC2_INTR_EN     (1U<<12)
   80 #define  ATI_REG_IER_NEW_FRAME_EN       (1U<<13)        /* (RO) */
   81 #define  ATI_REG_IER_SET_BUS_BUSY       (1U<<14)        /* (WO) audio is running */
   83 #define ATI_REG_CMD                     0x08            /* command */
   84 #define  ATI_REG_CMD_POWERDOWN          (1U<<0)
   85 #define  ATI_REG_CMD_RECEIVE_EN         (1U<<1)
   86 #define  ATI_REG_CMD_SEND_EN            (1U<<2)
   87 #define  ATI_REG_CMD_STATUS_MEM         (1U<<3)
   88 #define  ATI_REG_CMD_SPDF_OUT_EN        (1U<<4)
   89 #define  ATI_REG_CMD_SPDF_STATUS_MEM    (1U<<5)
   90 #define  ATI_REG_CMD_SPDF_THRESHOLD     (3U<<6)
   91 #define  ATI_REG_CMD_SPDF_THRESHOLD_SHIFT       6
   92 #define  ATI_REG_CMD_IN_DMA_EN          (1U<<8)
   93 #define  ATI_REG_CMD_OUT_DMA_EN         (1U<<9)
   94 #define  ATI_REG_CMD_SPDF_DMA_EN        (1U<<10)
   95 #define  ATI_REG_CMD_SPDF_OUT_STOPPED   (1U<<11)
   96 #define  ATI_REG_CMD_SPDF_CONFIG_MASK   (7U<<12)
   97 #define   ATI_REG_CMD_SPDF_CONFIG_34    (1U<<12)
   98 #define   ATI_REG_CMD_SPDF_CONFIG_78    (2U<<12)
   99 #define   ATI_REG_CMD_SPDF_CONFIG_69    (3U<<12)
  100 #define   ATI_REG_CMD_SPDF_CONFIG_01    (4U<<12)
  101 #define  ATI_REG_CMD_INTERLEAVE_SPDF    (1U<<16)
  102 #define  ATI_REG_CMD_AUDIO_PRESENT      (1U<<20)
  103 #define  ATI_REG_CMD_INTERLEAVE_IN      (1U<<21)
  104 #define  ATI_REG_CMD_INTERLEAVE_OUT     (1U<<22)
  105 #define  ATI_REG_CMD_LOOPBACK_EN        (1U<<23)
  106 #define  ATI_REG_CMD_PACKED_DIS         (1U<<24)
  107 #define  ATI_REG_CMD_BURST_EN           (1U<<25)
  108 #define  ATI_REG_CMD_PANIC_EN           (1U<<26)
  109 #define  ATI_REG_CMD_MODEM_PRESENT      (1U<<27)
  110 #define  ATI_REG_CMD_ACLINK_ACTIVE      (1U<<28)
  111 #define  ATI_REG_CMD_AC_SOFT_RESET      (1U<<29)
  112 #define  ATI_REG_CMD_AC_SYNC            (1U<<30)
  113 #define  ATI_REG_CMD_AC_RESET           (1U<<31)
  115 #define ATI_REG_PHYS_OUT_ADDR           0x0c
  116 #define  ATI_REG_PHYS_OUT_CODEC_MASK    (3U<<0)
  117 #define  ATI_REG_PHYS_OUT_RW            (1U<<2)
  118 #define  ATI_REG_PHYS_OUT_ADDR_EN       (1U<<8)
  119 #define  ATI_REG_PHYS_OUT_ADDR_SHIFT    9
  120 #define  ATI_REG_PHYS_OUT_DATA_SHIFT    16
  122 #define ATI_REG_PHYS_IN_ADDR            0x10
  123 #define  ATI_REG_PHYS_IN_READ_FLAG      (1U<<8)
  124 #define  ATI_REG_PHYS_IN_ADDR_SHIFT     9
  125 #define  ATI_REG_PHYS_IN_DATA_SHIFT     16
  127 #define ATI_REG_SLOTREQ                 0x14
  129 #define ATI_REG_COUNTER                 0x18
  130 #define  ATI_REG_COUNTER_SLOT           (3U<<0)         /* slot # */
  131 #define  ATI_REG_COUNTER_BITCLOCK       (31U<<8)
  133 #define ATI_REG_IN_FIFO_THRESHOLD       0x1c
  135 #define ATI_REG_IN_DMA_LINKPTR          0x20
  136 #define ATI_REG_IN_DMA_DT_START         0x24            /* RO */
  137 #define ATI_REG_IN_DMA_DT_NEXT          0x28            /* RO */
  138 #define ATI_REG_IN_DMA_DT_CUR           0x2c            /* RO */
  139 #define ATI_REG_IN_DMA_DT_SIZE          0x30
  141 #define ATI_REG_OUT_DMA_SLOT            0x34
  142 #define  ATI_REG_OUT_DMA_SLOT_BIT(x)    (1U << ((x) - 3))
  143 #define  ATI_REG_OUT_DMA_SLOT_MASK      0x1ff
  144 #define  ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
  145 #define  ATI_REG_OUT_DMA_THRESHOLD_SHIFT        11
  147 #define ATI_REG_OUT_DMA_LINKPTR         0x38
  148 #define ATI_REG_OUT_DMA_DT_START        0x3c            /* RO */
  149 #define ATI_REG_OUT_DMA_DT_NEXT         0x40            /* RO */
  150 #define ATI_REG_OUT_DMA_DT_CUR          0x44            /* RO */
  151 #define ATI_REG_OUT_DMA_DT_SIZE         0x48
  153 #define ATI_REG_SPDF_CMD                0x4c
  154 #define  ATI_REG_SPDF_CMD_LFSR          (1U<<4)
  155 #define  ATI_REG_SPDF_CMD_SINGLE_CH     (1U<<5)
  156 #define  ATI_REG_SPDF_CMD_LFSR_ACC      (0xff<<8)       /* RO */
  158 #define ATI_REG_SPDF_DMA_LINKPTR        0x50
  159 #define ATI_REG_SPDF_DMA_DT_START       0x54            /* RO */
  160 #define ATI_REG_SPDF_DMA_DT_NEXT        0x58            /* RO */
  161 #define ATI_REG_SPDF_DMA_DT_CUR         0x5c            /* RO */
  162 #define ATI_REG_SPDF_DMA_DT_SIZE        0x60
  164 #define ATI_REG_MODEM_MIRROR            0x7c
  165 #define ATI_REG_AUDIO_MIRROR            0x80
  167 #define ATI_REG_6CH_REORDER             0x84            /* reorder slots for 6ch */
  168 #define  ATI_REG_6CH_REORDER_EN         (1U<<0)         /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
  170 #define ATI_REG_FIFO_FLUSH              0x88
  171 #define  ATI_REG_FIFO_OUT_FLUSH         (1U<<0)
  172 #define  ATI_REG_FIFO_IN_FLUSH          (1U<<1)
  174 /* LINKPTR */
  175 #define  ATI_REG_LINKPTR_EN             (1U<<0)
  177 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
  178 #define  ATI_REG_DMA_DT_SIZE            (0xffffU<<0)
  179 #define  ATI_REG_DMA_FIFO_USED          (0x1fU<<16)
  180 #define  ATI_REG_DMA_FIFO_FREE          (0x1fU<<21)
  181 #define  ATI_REG_DMA_STATE              (7U<<26)