root/dev/ofw/ofw_pci.h

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    1 /*      $OpenBSD: ofw_pci.h,v 1.3 2004/10/01 04:08:45 jsg Exp $ */
    2 /*      $NetBSD: ofw_pci.h,v 1.4 2001/02/17 16:28:37 mrg Exp $  */
    3 
    4 /*-
    5  * Copyright (c) 1999 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by the NetBSD
   23  *      Foundation, Inc. and its contributors.
   24  * 4. Neither the name of The NetBSD Foundation nor the names of its
   25  *    contributors may be used to endorse or promote products derived
   26  *    from this software without specific prior written permission.
   27  *
   28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   38  * POSSIBILITY OF SUCH DAMAGE.
   39  */
   40 
   41 #ifndef _DEV_OFW_OFW_PCI_H_
   42 #define _DEV_OFW_OFW_PCI_H_
   43 
   44 /*
   45  * PCI Bus Binding to:
   46  *
   47  * IEEE Std 1275-1994
   48  * Standard for Boot (Initialization Configuration) Firmware
   49  *
   50  * Revision 2.1
   51  */
   52 
   53 /*
   54  * Section 2.2.1. Physical Address Formats
   55  *
   56  * A PCI physical address is represented by 3 address cells:
   57  *
   58  *      phys.hi cell:   npt000ss bbbbbbbb dddddfff rrrrrrrr
   59  *      phys.mid cell:  hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
   60  *      phys.lo cell:   llllllll llllllll llllllll llllllll
   61  *
   62  *      n       nonrelocatable
   63  *      p       prefetchable
   64  *      t       aliased below 1MB (memory) or 64k (i/o)
   65  *      ss      space code
   66  *      b       bus number
   67  *      d       device number
   68  *      f       function number
   69  *      r       register number
   70  *      h       high 32-bits of PCI address
   71  *      l       low 32-bits of PCI address
   72  */
   73 
   74 #define OFW_PCI_PHYS_HI_NONRELOCATABLE  0x80000000
   75 #define OFW_PCI_PHYS_HI_PREFETCHABLE    0x40000000
   76 #define OFW_PCI_PHYS_HI_ALIASED         0x20000000
   77 #define OFW_PCI_PHYS_HI_SPACEMASK       0x03000000
   78 #define OFW_PCI_PHYS_HI_BUSMASK         0x00ff0000
   79 #define OFW_PCI_PHYS_HI_BUSSHIFT        16
   80 #define OFW_PCI_PHYS_HI_DEVICEMASK      0x0000f800
   81 #define OFW_PCI_PHYS_HI_DEVICESHIFT     11
   82 #define OFW_PCI_PHYS_HI_FUNCTIONMASK    0x00000700
   83 #define OFW_PCI_PHYS_HI_FUNCTIONSHIFT   8
   84 #define OFW_PCI_PHYS_HI_REGISTERMASK    0x000000ff
   85 
   86 #define OFW_PCI_PHYS_HI_SPACE_CONFIG    0x00000000
   87 #define OFW_PCI_PHYS_HI_SPACE_IO        0x01000000
   88 #define OFW_PCI_PHYS_HI_SPACE_MEM32     0x02000000
   89 #define OFW_PCI_PHYS_HI_SPACE_MEM64     0x03000000
   90 
   91 #define OFW_PCI_PHYS_HI_BUS(hi) \
   92         (((hi) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
   93 #define OFW_PCI_PHYS_HI_DEVICE(hi) \
   94         (((hi) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
   95 #define OFW_PCI_PHYS_HI_FUNCTION(hi) \
   96         (((hi) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
   97 
   98 /*
   99  * This has the 3 32bit cell values, plus 2 more to make up a 64-bit size.
  100  */
  101 struct ofw_pci_register {
  102         u_int32_t       phys_hi;
  103         u_int32_t       phys_mid;
  104         u_int32_t       phys_lo;
  105         u_int32_t       size_hi;
  106         u_int32_t       size_lo;
  107 };
  108 
  109 #endif /* _DEV_OFW_OFW_PCI_H_ */

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