1 /* $OpenBSD: tlphyreg.h,v 1.2 2002/05/04 11:30:06 fgsch Exp $ */
2 /* $NetBSD: tlphyreg.h,v 1.1 1998/08/10 23:59:58 thorpej Exp $ */
3
4 /*
5 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Manuel Bouyer.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _DEV_MII_TLPHYREG_H_
34 #define _DEV_MII_TLPHYREG_H_
35
36 /*
37 * Registers for the TI ThunderLAN internal PHY.
38 */
39
40 #define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
41 #define ID_10BASETAUI 0x0001 /* 10baseT/AUI PHY */
42
43 #define MII_TLPHY_CTRL 0x11 /* Control regiseter */
44 #define CTRL_ILINK 0x8000 /* Ignore link */
45 #define CTRL_SWPOL 0x4000 /* swap polarity */
46 #define CTRL_AUISEL 0x2000 /* Select AUI */
47 #define CTRL_SQEEN 0x1000 /* Enable SQE */
48 #define CTRL_NFEW 0x0004 /* Not far end wrap */
49 #define CTRL_INTEN 0x0002 /* Interrupts enable */
50 #define CTRL_TINT 0x0001 /* Test Interrupts */
51
52 #define MII_TLPHY_ST 0x12 /* Status register */
53 #define ST_MII_INT 0x8000 /* MII interrupt */
54 #define ST_PHOK 0x4000 /* Power high OK */
55 #define ST_POLOK 0x2000 /* Polarity OK */
56 #define ST_TPE 0x1000 /* Twisted pair energy */
57
58 #endif /* _DEV_MII_TLPHYREG_H_ */