root/dev/mii/ipgphyreg.h

INCLUDED FROM

    1 /*      $OpenBSD: ipgphyreg.h,v 1.1 2006/07/12 19:05:50 brad Exp $      */
    3 /*-
    4  * Copyright (c) 2006, Pyun YongHyeon
    5  * All rights reserved.
    6  *              
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:             
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice unmodified, this list of conditions, and the following
   12  *    disclaimer.  
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  */
   31 #ifndef _DEV_MII_IPGPHYREG_H_
   32 #define _DEV_MII_IPGPHYREG_H_
   34 /*
   35  * Registers for the IC Plus IPGA internal PHY.
   36  */
   38 /* Control register */
   39 #define IPGPHY_MII_BMCR         0x00
   40 #define IPGPHY_BMCR_FDX         0x0100
   41 #define IPGPHY_BMCR_STARTNEG            0x0200
   42 #define IPGPHY_BMCR_ISO         0x0400
   43 #define IPGPHY_BMCR_PDOWN               0x0800
   44 #define IPGPHY_BMCR_AUTOEN              0x1000
   45 #define IPGPHY_BMCR_LOOP                0x4000
   46 #define IPGPHY_BMCR_RESET               0x8000
   48 #define IPGPHY_BMCR_10          0x0000
   49 #define IPGPHY_BMCR_100         0x2000
   50 #define IPGPHY_BMCR_1000                0x0040
   52 /* Status register */
   53 #define IPGPHY_MII_BMSR         0x01
   54 #define IPGPHY_BMSR_EXT         0x0001
   55 #define IPGPHY_BMSR_LINK                0x0004
   56 #define IPGPHY_BMSR_ANEG                0x0008
   57 #define IPGPHY_BMSR_RFAULT              0x0010
   58 #define IPGPHY_BMSR_ANEGCOMP            0x0020
   59 #define IPGPHY_BMSR_EXTSTS              0x0100
   61 #define IPGPHY_MII_ID1          0x02
   63 /* Autonegotiation advertisement register */
   64 #define IPGPHY_MII_ANAR         0x04
   65 #define IPGPHY_ANAR_10T         0x0020
   66 #define IPGPHY_ANAR_10T_FDX             0x0040
   67 #define IPGPHY_ANAR_100TX               0x0080
   68 #define IPGPHY_ANAR_100TX_FDX   0x0100
   69 #define IPGPHY_ANAR_100T4               0x0200
   70 #define IPGPHY_ANAR_PAUSE               0x0400
   71 #define IPGPHY_ANAR_APAUSE              0x0800
   72 #define IPGPHY_ANAR_RFAULT              0x2000
   73 #define IPGPHY_ANAR_NP          0x8000
   75 /* Autonegotiation link parnet ability register */
   76 #define IPGPHY_MII_ANLPAR               0x05
   77 #define IPGPHY_ANLPAR_10T               0x0020
   78 #define IPGPHY_ANLPAR_10T_FDX   0x0040
   79 #define IPGPHY_ANLPAR_100TX             0x0080
   80 #define IPGPHY_ANLPAR_100TX_FDX 0x0100
   81 #define IPGPHY_ANLPAR_100T4             0x0200
   82 #define IPGPHY_ANLPAR_PAUSE             0x0400
   83 #define IPGPHY_ANLPAR_APAUSE            0x0800
   84 #define IPGPHY_ANLPAR_RFAULT            0x2000
   85 #define IPGPHY_ANLPAR_ACK               0x4000
   86 #define IPGPHY_ANLPAR_NP                0x8000
   88 /* Autonegotiation expansion register */
   89 #define IPGPHY_MII_ANER         0x06
   90 #define IPGPHY_ANER_LPNWAY              0x0001
   91 #define IPGPHY_ANER_PRCVD               0x0002
   92 #define IPGPHY_ANER_NEXTP               0x0004
   93 #define IPGPHY_ANER_LPNEXTP             0x0008
   94 #define IPGPHY_ANER_PDF         0x0100
   96 /* Autonegotiation next page transmit register */
   97 #define IPGPHY_MII_NEXTP                0x07
   98 #define IPGPHY_NEXTP_MSGC               0x0001
   99 #define IPGPHY_NEXTP_TOGGLE             0x0800
  100 #define IPGPHY_NEXTP_ACK2               0x1000
  101 #define IPGPHY_NEXTP_MSGP               0x2000
  102 #define IPGPHY_NEXTP_NEXTP              0x8000
  104 /* Autonegotiation link partner next page register */
  105 #define IPGPHY_MII_NEXTPLP              0x08
  106 #define IPGPHY_NEXTPLP_MSGC             0x0001
  107 #define IPGPHY_NEXTPLP_TOGGLE   0x0800
  108 #define IPGPHY_NEXTPLP_ACK2             0x1000
  109 #define IPGPHY_NEXTPLP_MSGP             0x2000
  110 #define IPGPHY_NEXTPLP_ACK              0x4000
  111 #define IPGPHY_NEXTPLP_NEXTP            0x8000
  113 /* 1000baseT control register */
  114 #define IPGPHY_MII_1000CR               0x09
  115 #define IPGPHY_1000CR_1000T             0x0100
  116 #define IPGPHY_1000CR_1000T_FDX 0x0200
  117 #define IPGPHY_1000CR_MASTER            0x0400
  118 #define IPGPHY_1000CR_MMASTER   0x0800
  119 #define IPGPHY_1000CR_MANUAL            0x1000
  120 #define IPGPHY_1000CR_TMNORMAL  0x0000
  121 #define IPGPHY_1000CR_TM1               0x2000
  122 #define IPGPHY_1000CR_TM2               0x4000
  123 #define IPGPHY_1000CR_TM3               0x6000
  124 #define IPGPHY_1000CR_TM4               0x8000
  126 /* 1000baseT status register */
  127 #define IPGPHY_MII_1000SR               0x0A
  128 #define IPGPHY_1000SR_LP                0x0400
  129 #define IPGPHY_1000SR_LP_FDX            0x0800
  130 #define IPGPHY_1000SR_RXSTAT            0x1000
  131 #define IPGPHY_1000SR_LRXSTAT   0x2000
  132 #define IPGPHY_1000SR_MASTER            0x4000
  133 #define IPGPHY_1000SR_MASTERF   0x8000
  135 /* Extended status register */
  136 #define IPGPHY_MII_EXTSTS               0x0F
  137 #define IPGPHY_EXTSTS_1000T             0x1000
  138 #define IPGPHY_EXTSTS_1000T_FDX 0x2000
  139 #define IPGPHY_EXTSTS_1000X             0x4000
  140 #define IPGPHY_EXTSTS_1000X_FDX 0x8000
  142 #endif /* _DEV_MII_IPGPHYREG_H_ */