1 /* $OpenBSD: gusreg.h,v 1.5 2001/01/29 05:30:31 mickey Exp $ */
2 /* $NetBSD: gusreg.h,v 1.6 1997/10/09 07:57:22 jtc Exp $ */
3
4 /*-
5 * Copyright (c) 1996 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Ken Hornstein and John Kohl.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Register definitions of Gravis UltraSound card
42 */
43
44 /*
45 * MIDI control registers. Essentially a MC6850 UART. Note the MC6850's
46 * "feature" of having read-only and write-only registers combined on one
47 * address.
48 */
49
50 #define GUS_IOH4_OFFSET 0x100
51 #define GUS_NPORT4 2
52
53 #define GUS_MIDI_CONTROL (0x100-GUS_IOH4_OFFSET)
54 #define GUS_MIDI_STATUS (0x100-GUS_IOH4_OFFSET)
55 #define GUS_MIDI_READ (0x101-GUS_IOH4_OFFSET)
56 #define GUS_MIDI_WRITE (0x101-GUS_IOH4_OFFSET)
57
58 /*
59 * Joystick interface - note this is an absolute address, NOT an offset from
60 * the GUS base address.
61 */
62
63 #define GUS_JOYSTICK 0x201
64
65 /*
66 * GUS control registers
67 */
68
69 #define GUS_MIX_CONTROL 0x000
70 #define GUS_IRQ_STATUS 0x006
71 #define GUS_TIMER_CONTROL 0x008
72 #define GUS_TIMER_DATA 0x009
73 #define GUS_REG_CONTROL 0x00f /* rev 3.4 or later only: select reg
74 at 2XB */
75 #define GUS_REG_NORMAL 0x00 /* IRQ/DMA as usual */
76 #define GUS_REG_IRQCTL 0x05 /* IRQ ctl: write 0 to clear IRQ state */
77 #define GUS_REG_JUMPER 0x06 /* jumper control: */
78 #define GUS_JUMPER_MIDIEN 0x02 /* bit: enable MIDI ports */
79 #define GUS_JUMPER_JOYEN 0x04 /* bit: enable joystick ports */
80
81 #define GUS_IRQ_CONTROL 0x00b
82 #define GUS_DMA_CONTROL 0x00b
83 #define GUS_IRQCTL_CONTROL 0x00b
84 #define GUS_JUMPER_CONTROL 0x00b
85
86 #define GUS_NPORT1 16
87
88 #define GUS_IOH2_OFFSET 0x102
89 #define GUS_VOICE_SELECT (0x102-GUS_IOH2_OFFSET)
90 #define GUS_REG_SELECT (0x103-GUS_IOH2_OFFSET)
91 #define GUS_DATA_LOW (0x104-GUS_IOH2_OFFSET)
92 #define GUS_DATA_HIGH (0x105-GUS_IOH2_OFFSET)
93 /* GUS_MIXER_SELECT 106 */
94 #define GUS_DRAM_DATA (0x107-GUS_IOH2_OFFSET)
95
96 #define GUS_NPORT2 6
97
98 /*
99 * GUS on-board global registers
100 */
101
102 #define GUSREG_DMA_CONTROL 0x41
103 #define GUSREG_DMA_START 0x42
104 #define GUSREG_DRAM_ADDR_LOW 0x43
105 #define GUSREG_DRAM_ADDR_HIGH 0x44
106 #define GUSREG_TIMER_CONTROL 0x45
107 #define GUSREG_TIMER1_COUNT 0x46 /* count-up, then interrupt, 80usec */
108 #define GUSREG_TIMER2_COUNT 0x47 /* count-up, then interrupt, 320usec */
109 #define GUSREG_SAMPLE_FREQ 0x48 /* 9878400/(16*(rate+2)) */
110 #define GUSREG_SAMPLE_CONTROL 0x49
111 #define GUSREG_JOYSTICK_TRIM 0x4b
112 #define GUSREG_RESET 0x4c
113
114 /*
115 * GUS voice specific registers (some of which aren't!). Add 0x80 to these
116 * registers for reads
117 */
118
119 #define GUSREG_READ 0x80
120 #define GUSREG_VOICE_CNTL 0x00
121 #define GUSREG_FREQ_CONTROL 0x01
122 #define GUSREG_START_ADDR_HIGH 0x02
123 #define GUSREG_START_ADDR_LOW 0x03
124 #define GUSREG_END_ADDR_HIGH 0x04
125 #define GUSREG_END_ADDR_LOW 0x05
126 #define GUSREG_VOLUME_RATE 0x06
127 #define GUSREG_START_VOLUME 0x07
128 #define GUSREG_END_VOLUME 0x08
129 #define GUSREG_CUR_VOLUME 0x09
130 #define GUSREG_CUR_ADDR_HIGH 0x0a
131 #define GUSREG_CUR_ADDR_LOW 0x0b
132 #define GUSREG_PAN_POS 0x0c
133 #define GUSREG_VOLUME_CONTROL 0x0d
134 #define GUSREG_ACTIVE_VOICES 0x0e /* voice-independent:set voice count */
135 #define GUSREG_IRQ_STATUS 0x8f /* voice-independent */
136
137 #define GUS_PAN_FULL_LEFT 0x0
138 #define GUS_PAN_FULL_RIGHT 0xf
139
140 /*
141 * GUS Bitmasks for reset register
142 */
143
144 #define GUSMASK_MASTER_RESET 0x01
145 #define GUSMASK_DAC_ENABLE 0x02
146 #define GUSMASK_IRQ_ENABLE 0x04
147
148 /*
149 * Bitmasks for IRQ status port
150 */
151
152 #define GUSMASK_IRQ_MIDIXMIT 0x01 /* MIDI transmit IRQ */
153 #define GUSMASK_IRQ_MIDIRCVR 0x02 /* MIDI received IRQ */
154 #define GUSMASK_IRQ_TIMER1 0x04 /* timer 1 IRQ */
155 #define GUSMASK_IRQ_TIMER2 0x08 /* timer 2 IRQ */
156 #define GUSMASK_IRQ_RESERVED 0x10 /* Reserved (set to 0) */
157 #define GUSMASK_IRQ_VOICE 0x20 /* Wavetable IRQ (any voice) */
158 #define GUSMASK_IRQ_VOLUME 0x40 /* Volume ramp IRQ (any voc) */
159 #define GUSMASK_IRQ_DMATC 0x80 /* DMA transfer complete */
160
161 /*
162 * Bitmasks for sampling control register
163 */
164 #define GUSMASK_SAMPLE_START 0x01 /* start sampling */
165 #define GUSMASK_SAMPLE_STEREO 0x02 /* mono or stereo */
166 #define GUSMASK_SAMPLE_DATA16 0x04 /* 16-bit DMA channel */
167 #define GUSMASK_SAMPLE_IRQ 0x20 /* enable IRQ */
168 #define GUSMASK_SAMPLE_DMATC 0x40 /* DMA transfer complete */
169 #define GUSMASK_SAMPLE_INVBIT 0x80 /* invert MSbit */
170
171 /*
172 * Bitmasks for IRQ status register (different than IRQ status _port_ - the
173 * register is internal to the GUS)
174 */
175
176 #define GUSMASK_WIRQ_VOLUME 0x40 /* Flag for volume interrupt */
177 #define GUSMASK_WIRQ_VOICE 0x80 /* Flag for voice interrupt */
178 #define GUSMASK_WIRQ_VOICEMASK 0x1f /* Bits holding voice # */
179
180 /*
181 * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
182 */
183
184 #define GUSMASK_LINE_IN 0x01 /* 0=enable */
185 #define GUSMASK_LINE_OUT 0x02 /* 0=enable */
186 #define GUSMASK_MIC_IN 0x04 /* 1=enable */
187 #define GUSMASK_LATCHES 0x08 /* enable IRQ latches */
188 #define GUSMASK_COMBINE 0x10 /* combine Ch 1 IRQ & Ch 2 (MIDI) */
189 #define GUSMASK_MIDI_LOOPBACK 0x20 /* MIDI loopback */
190 #define GUSMASK_CONTROL_SEL 0x40 /* Select control register */
191
192 #define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */
193
194 /*
195 * GUS bitmaks for DMA control
196 */
197
198 #define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */
199 #define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */
200 #define GUSMASK_DMA_WRITE 0x00 /* for consistancy */
201 #define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */
202 #define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */
203 #define GUSMASK_DMA_R1 0x08
204 #define GUSMASK_DMA_R2 0x10
205 #define GUSMASK_DMA_R3 0x18
206 #define GUSMASK_DMA_IRQ 0x20 /* Enable DMA to IRQ */
207 #define GUSMASK_DMA_IRQPEND 0x40 /* DMA IRQ pending */
208 #define GUSMASK_DMA_DATA_SIZE 0x40 /* 0=8 bit, 1=16 bit */
209 #define GUSMASK_DMA_INVBIT 0x80 /* invert high bit */
210
211 /*
212 * GUS bitmasks for voice control
213 */
214
215 #define GUSMASK_VOICE_STOPPED 0x01 /* The voice is stopped */
216 #define GUSMASK_STOP_VOICE 0x02 /* Force voice to stop */
217 #define GUSMASK_DATA_SIZE16 0x04 /* 1=16 bit, 0=8 bit data */
218 #define GUSMASK_LOOP_ENABLE 0x08 /* Loop voice at end */
219 #define GUSMASK_VOICE_BIDIR 0x10 /* Bi-directional looping */
220 #define GUSMASK_VOICE_IRQ 0x20 /* Enable the voice IRQ */
221 #define GUSMASK_INCR_DIR 0x40 /* Direction of address incr */
222 #define GUSMASK_VOICE_IRQPEND 0x80 /* Pending IRQ for voice */
223
224 /*
225 * Bitmasks for volume control
226 */
227
228 #define GUSMASK_VOLUME_STOPPED 0x01 /* Volume ramping stopped */
229 #define GUSMASK_STOP_VOLUME 0x02 /* Manually stop volume */
230 #define GUSMASK_VOICE_ROLL 0x04 /* Roll over/low water condition */
231 #define GUSMASK_VOLUME_LOOP 0x08 /* Volume ramp looping */
232 #define GUSMASK_VOLUME_BIDIR 0x10 /* Bi-dir volume looping */
233 #define GUSMASK_VOLUME_IRQ 0x20 /* IRQ on end of volume ramp */
234 #define GUSMASK_VOLUME_DIR 0x40 /* Direction of volume ramp */
235 #define GUSMASK_VOLUME_IRQPEND 0x80 /* Pending volume IRQ */
236 #define MIDI_RESET 0x03
237
238 /*
239 * ICS Mixer registers
240 */
241
242 #define GUS_IOH3_OFFSET 0x506
243 #define GUS_NPORT3 1
244
245 #define GUS_MIXER_SELECT (0x506-GUS_IOH3_OFFSET) /* read=board rev, wr=mixer */
246 #define GUS_BOARD_REV (0x506-GUS_IOH3_OFFSET)
247 #define GUS_MIXER_DATA (0x106-GUS_IOH2_OFFSET) /* data for mixer control */
248
249 #define GUSMIX_CHAN_MIC ICSMIX_CHAN_0
250 #define GUSMIX_CHAN_LINE ICSMIX_CHAN_1
251 #define GUSMIX_CHAN_CD ICSMIX_CHAN_2
252 #define GUSMIX_CHAN_DAC ICSMIX_CHAN_3
253 #define GUSMIX_CHAN_MASTER ICSMIX_CHAN_5
254
255 /*
256 * Codec/Mixer registers
257 */
258
259 #define GUS_MAX_CODEC_BASE 0x10C
260 #define GUS_DAUGHTER_CODEC_BASE 0x530
261 #define GUS_DAUGHTER_CODEC_BASE2 0x604
262 #define GUS_DAUGHTER_CODEC_BASE3 0xE80
263 #define GUS_DAUGHTER_CODEC_BASE4 0xF40
264
265 #define GUS_CODEC_SELECT 0
266 #define GUS_CODEC_DATA 1
267 #define GUS_CODEC_STATUS 2
268 #define GUS_CODEC_PIO 3
269
270 #define GUS_MAX_CTRL 0x106
271 #define GUS_MAX_BASEBITS 0xf /* sets middle nibble of 3X6 */
272 #define GUS_MAX_RECCHAN16 0x10 /* 0=8bit DMA read, 1=16bit DMA read */
273 #define GUS_MAX_PLAYCHAN16 0x20 /* 0=8bit, 1=16bit */
274 #define GUS_MAX_CODEC_ENABLE 0x40 /* 0=disable, 1=enable */