wrmsr            1087 arch/i386/i386/est.c 	wrmsr(MSR_PERF_CTL, msr);
wrmsr             292 arch/i386/i386/i686_mem.c 	wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800);	/* disable MTRRs (E = 0) */
wrmsr             305 arch/i386/i386/i686_mem.c 			wrmsr(msr, msrv);
wrmsr             317 arch/i386/i386/i686_mem.c 			wrmsr(msr, msrv);
wrmsr             329 arch/i386/i386/i686_mem.c 			wrmsr(msr, msrv);
wrmsr             345 arch/i386/i386/i686_mem.c 		wrmsr(msr, msrv);	
wrmsr             353 arch/i386/i386/i686_mem.c 		wrmsr(msr + 1, msrv);
wrmsr             356 arch/i386/i386/i686_mem.c 	wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | 0x800);	/* restore MTRR state */
wrmsr             600 arch/i386/i386/i686_mem.c 	wrmsr(MSR_MTRRdefType, mtrrdef); /* set MTRR behaviour to match BSP */
wrmsr             171 arch/i386/i386/k6_mem.c 	wrmsr(UWCCR, reg);
wrmsr             115 arch/i386/i386/longrun.c 	wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
wrmsr             119 arch/i386/i386/longrun.c 	wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
wrmsr            1127 arch/i386/i386/machdep.c 				wrmsr(0x110B, msreg);
wrmsr            1139 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
wrmsr            1152 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
wrmsr            1165 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
wrmsr            1178 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
wrmsr            1423 arch/i386/i386/machdep.c 		wrmsr(MSR_SYSENTER_CS, 0);
wrmsr            1452 arch/i386/i386/machdep.c 		wrmsr(MSR_BBL_CR_CTL, msr119);
wrmsr             125 arch/i386/i386/p4tcc.c 	wrmsr(MSR_THERM_CONTROL, msreg);
wrmsr             110 arch/i386/i386/pctr.c 	wrmsr(P5MSR_CTRSEL, msr11);
wrmsr             111 arch/i386/i386/pctr.c 	wrmsr(msr, 0);
wrmsr             147 arch/i386/i386/pctr.c 	wrmsr(msrval, 0);
wrmsr             148 arch/i386/i386/pctr.c 	wrmsr(msrsel, fn);
wrmsr             149 arch/i386/i386/pctr.c 	wrmsr(msrval, 0);
wrmsr              90 arch/i386/i386/powernow-k7.c 	wrmsr(MSR_AMDK7_FIDVID_CTL,	\
wrmsr             190 arch/i386/i386/powernow-k7.c 		wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);
wrmsr             192 arch/i386/i386/powernow-k7.c 			wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);
wrmsr             194 arch/i386/i386/powernow-k7.c 		wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);
wrmsr             196 arch/i386/i386/powernow-k7.c 			wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);
wrmsr              93 arch/i386/i386/powernow-k8.c 	wrmsr(MSR_AMDK7_FIDVID_CTL,	\
wrmsr              62 arch/i386/i386/powernow.c 	wrmsr(MSR_K6_EPMR, msrval);
wrmsr              66 arch/i386/i386/powernow.c 	wrmsr(MSR_K6_EPMR, 0LL);
wrmsr              94 arch/i386/i386/powernow.c 	wrmsr(MSR_K6_EPMR, msrval);
wrmsr             102 arch/i386/i386/powernow.c 	wrmsr(MSR_K6_EPMR, 0LL);
wrmsr              66 arch/i386/include/cpufunc.h static __inline void wrmsr(u_int, u_int64_t);
wrmsr             265 arch/i386/pci/glxsb.c 	wrmsr(SB_GLD_MSR_CTRL, msr);