sdla_bus_write_4 984 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 991 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 995 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1005 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1017 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1057 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1086 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1115 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_DMA_CONTROL_REG, reg); sdla_bus_write_4 1124 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, reg); sdla_bus_write_4 1139 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1149 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1167 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1177 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, reg); sdla_bus_write_4 1183 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 1282 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, sdla_bus_write_4 1324 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, sdla_bus_write_4 1371 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, sdla_bus_write_4 1392 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, sdla_bus_write_4 1427 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, sdla_bus_write_4 1444 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, sdla_bus_write_4 1506 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1554 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1596 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_GLOBAL_INTER_MASK, reg); sdla_bus_write_4 1623 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_GLOBAL_INTER_MASK, reg); sdla_bus_write_4 1634 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, sdla_bus_write_4 1645 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1647 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1716 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1742 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1890 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1921 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 1975 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 2381 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_DMA_CONTROL_REG, reg); sdla_bus_write_4 3062 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_DMA_CONTROL_REG, reg); sdla_bus_write_4 3154 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 3170 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, reg); sdla_bus_write_4 3174 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_DMA_CONTROL_REG, reg); sdla_bus_write_4 3185 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 3204 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, dma_descr, reg); sdla_bus_write_4 3267 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, reg_off, data); sdla_bus_write_4 3486 dev/pci/if_san_xilinx.c sdla_bus_write_4(card->hw, XILINX_CHIP_CFG_REG, led); sdla_bus_write_4 421 dev/pci/if_san_xilinx.h sdla_bus_write_4(card->hw,AFT_TE3_RX_WDT_CTRL_REG,0); sdla_bus_write_4 427 dev/pci/if_san_xilinx.h sdla_bus_write_4(card->hw,AFT_TE3_RX_WDT_CTRL_REG,timeout); sdla_bus_write_4 432 dev/pci/if_san_xilinx.h sdla_bus_write_4(card->hw,AFT_TE3_TX_WDT_CTRL_REG,0); sdla_bus_write_4 438 dev/pci/if_san_xilinx.h sdla_bus_write_4(card->hw,AFT_TE3_TX_WDT_CTRL_REG,timeout); sdla_bus_write_4 1052 dev/pci/if_sandrv.c sdla_bus_write_4(hw, offset, *(unsigned long *)buf); sdla_bus_write_4 315 dev/pci/if_sandrv.h extern int sdla_bus_write_4(void*, unsigned int, u_int32_t);