ir                201 dev/sbus/qereg.h 	u_int8_t ir;		[8]	/* interrupt register */
ir                482 dev/tc/tcds.c  	u_int32_t ir, ir0;
ir                488 dev/tc/tcds.c  	ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
ir                494 dev/tc/tcds.c  	if (ir & sc->sc_slots[slot].sc_intrbits) {			\
ir                513 dev/tc/tcds.c  	if (ir & bits)							\