cardbus_conf_read  167 dev/cardbus/cardbus.c 			u_int32_t e = (cf->cardbus_conf_read)(cc, tag, i);
cardbus_conf_read  216 dev/cardbus/cardbus.c 			exrom = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  219 dev/cardbus/cardbus.c 			command = cardbus_conf_read(cc, cf, tag,
cardbus_conf_read  246 dev/cardbus/cardbus.c 			exrom = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  250 dev/cardbus/cardbus.c 			command = cardbus_conf_read(cc, cf, tag,
cardbus_conf_read  260 dev/cardbus/cardbus.c 		command = cardbus_conf_read(cc, cf, tag,
cardbus_conf_read  409 dev/cardbus/cardbus.c 		id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG);
cardbus_conf_read  424 dev/cardbus/cardbus.c 	bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
cardbus_conf_read  438 dev/cardbus/cardbus.c 		id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG);
cardbus_conf_read  439 dev/cardbus/cardbus.c 		class = cardbus_conf_read(cc, cf, tag, CARDBUS_CLASS_REG);
cardbus_conf_read  440 dev/cardbus/cardbus.c 		cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG);
cardbus_conf_read  462 dev/cardbus/cardbus.c 		bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
cardbus_conf_read  473 dev/cardbus/cardbus.c 		bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
cardbus_conf_read  738 dev/cardbus/cardbus.c 	command = cardbus_conf_read(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_read  781 dev/cardbus/cardbus.c 	reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
cardbus_conf_read  785 dev/cardbus/cardbus.c 	ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
cardbus_conf_read  792 dev/cardbus/cardbus.c 		reg = cardbus_conf_read(cc, cf, tag, ofs);
cardbus_conf_read   75 dev/cardbus/cardbus_map.c 	address = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read   77 dev/cardbus/cardbus_map.c 	mask = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  123 dev/cardbus/cardbus_map.c 	address = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  125 dev/cardbus/cardbus_map.c 	mask = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  180 dev/cardbus/cardbus_map.c 	address = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  182 dev/cardbus/cardbus_map.c 	mask = cardbus_conf_read(cc, cf, tag, reg);
cardbus_conf_read  363 dev/cardbus/cardbus_map.c 	ct->ct_bar[0] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE0_REG);
cardbus_conf_read  364 dev/cardbus/cardbus_map.c 	ct->ct_bar[1] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE1_REG);
cardbus_conf_read  365 dev/cardbus/cardbus_map.c 	ct->ct_bar[2] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE2_REG);
cardbus_conf_read  366 dev/cardbus/cardbus_map.c 	ct->ct_bar[3] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE3_REG);
cardbus_conf_read  367 dev/cardbus/cardbus_map.c 	ct->ct_bar[4] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE4_REG);
cardbus_conf_read  368 dev/cardbus/cardbus_map.c 	ct->ct_bar[5] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE5_REG);
cardbus_conf_read  192 dev/cardbus/cardbusvar.h 	cardbusreg_t (*cardbus_conf_read)(cardbus_chipset_tag_t,
cardbus_conf_read  440 dev/cardbus/cardbusvar.h     (*(ct)->ct_cf->cardbus_conf_read)((ct)->ct_cf, (tag), (offs))
cardbus_conf_read  442 dev/cardbus/cardbusvar.h     ((cf)->cardbus_conf_read)((cc), (tag), (offs))
cardbus_conf_read  318 dev/cardbus/com_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->cc_tag, CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_read  327 dev/cardbus/com_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->cc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  137 dev/cardbus/ehci_cardbus.c 	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
cardbus_conf_read  295 dev/cardbus/if_acx_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  302 dev/cardbus/if_ath_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  312 dev/cardbus/if_ath_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  167 dev/cardbus/if_atw_cardbus.c 	    cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80),
cardbus_conf_read  349 dev/cardbus/if_atw_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  360 dev/cardbus/if_atw_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  125 dev/cardbus/if_dc_cardbus.c 	sc->dc_cachesize = cardbus_conf_read(cc, cf, ca->ca_tag, DC_PCI_CFLT)
cardbus_conf_read  190 dev/cardbus/if_dc_cardbus.c 	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
cardbus_conf_read  272 dev/cardbus/if_dc_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_CFDA);
cardbus_conf_read  280 dev/cardbus/if_dc_cardbus.c 		r = cardbus_conf_read(cc, cf, csc->sc_tag, r + 4) & 3;
cardbus_conf_read  291 dev/cardbus/if_dc_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
cardbus_conf_read  295 dev/cardbus/if_dc_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
cardbus_conf_read  210 dev/cardbus/if_fxp_cardbus.c 	command = cardbus_conf_read(cc, cf, csc->ct_tag, CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_read  189 dev/cardbus/if_malo_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  243 dev/cardbus/if_pgt_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  264 dev/cardbus/if_ral_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  188 dev/cardbus/if_re_cardbus.c 		command = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  195 dev/cardbus/if_re_cardbus.c 			iobase = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_LOIO);
cardbus_conf_read  196 dev/cardbus/if_re_cardbus.c 			membase = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_LOMEM);
cardbus_conf_read  197 dev/cardbus/if_re_cardbus.c 			irq = cardbus_conf_read(cc, cf, csc->sc_tag, RL_PCI_INTLINE);
cardbus_conf_read  222 dev/cardbus/if_re_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_read  228 dev/cardbus/if_re_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  293 dev/cardbus/if_rl_cardbus.c 		command = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4);
cardbus_conf_read  298 dev/cardbus/if_rl_cardbus.c 			iobase = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  300 dev/cardbus/if_rl_cardbus.c 			membase = cardbus_conf_read(cc, cf,csc->sc_tag,
cardbus_conf_read  302 dev/cardbus/if_rl_cardbus.c 			irq = cardbus_conf_read(cc, cf,csc->sc_tag,
cardbus_conf_read  332 dev/cardbus/if_rl_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, 
cardbus_conf_read  343 dev/cardbus/if_rl_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  228 dev/cardbus/if_rtw_cardbus.c 	     cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
cardbus_conf_read  404 dev/cardbus/if_rtw_cardbus.c 		reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
cardbus_conf_read  433 dev/cardbus/if_rtw_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
cardbus_conf_read  444 dev/cardbus/if_rtw_cardbus.c 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  240 dev/cardbus/if_xl_cardbus.c 	command = cardbus_conf_read(cc, cf, ca->ca_tag,
cardbus_conf_read  270 dev/cardbus/if_xl_cardbus.c 	bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG);
cardbus_conf_read  140 dev/cardbus/ohci_cardbus.c 	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
cardbus_conf_read   64 dev/cardbus/puc_cardbus.c 	bhlc = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG);
cardbus_conf_read   73 dev/cardbus/puc_cardbus.c 	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
cardbus_conf_read   98 dev/cardbus/puc_cardbus.c 	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_SUBSYS_ID_REG);
cardbus_conf_read  127 dev/cardbus/puc_cardbus.c 		reg = cardbus_conf_read(cc, cf, ca->ca_tag, reg + 4) & 3;
cardbus_conf_read  129 dev/cardbus/uhci_cardbus.c 	csr = cardbus_conf_read(cc, cf, ca->ca_tag,
cardbus_conf_read  147 dev/cardbus/uhci_cardbus.c 	switch(cardbus_conf_read(cc, cf, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {