VR_COMMAND        554 dev/pci/if_vr.c 	if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) {
VR_COMMAND        556 dev/pci/if_vr.c 		VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
VR_COMMAND        560 dev/pci/if_vr.c 		VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
VR_COMMAND        562 dev/pci/if_vr.c 		VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
VR_COMMAND        565 dev/pci/if_vr.c 		VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
VR_COMMAND        573 dev/pci/if_vr.c 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
VR_COMMAND        577 dev/pci/if_vr.c 		if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
VR_COMMAND       1049 dev/pci/if_vr.c 	VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);      
VR_COMMAND       1053 dev/pci/if_vr.c 	    i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON);
VR_COMMAND       1066 dev/pci/if_vr.c 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
VR_COMMAND       1067 dev/pci/if_vr.c 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
VR_COMMAND       1097 dev/pci/if_vr.c 			    i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON);
VR_COMMAND       1245 dev/pci/if_vr.c 					VR_SETBIT16(sc, VR_COMMAND,
VR_COMMAND       1247 dev/pci/if_vr.c 					VR_SETBIT16(sc, VR_COMMAND,
VR_COMMAND       1379 dev/pci/if_vr.c 		VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/VR_CMD_TX_GO);
VR_COMMAND       1474 dev/pci/if_vr.c 	CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
VR_COMMAND       1646 dev/pci/if_vr.c 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
VR_COMMAND       1647 dev/pci/if_vr.c 	VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));