VGE_CRS1          538 dev/pci/if_vge.c 	CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_SOFTRESET);
VGE_CRS1          542 dev/pci/if_vge.c 		if ((CSR_READ_1(sc, VGE_CRS1) & VGE_CR1_SOFTRESET) == 0)
VGE_CRS1         1177 dev/pci/if_vge.c 		CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
VGE_CRS1         1485 dev/pci/if_vge.c 	CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
VGE_CRS1         1598 dev/pci/if_vge.c 	CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_NOPOLL);