TI_MISC_LOCAL_CTL 212 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); TI_MISC_LOCAL_CTL 219 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); TI_MISC_LOCAL_CTL 221 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); TI_MISC_LOCAL_CTL 223 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 225 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 231 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); TI_MISC_LOCAL_CTL 236 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 237 dev/pci/if_ti.c ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN; TI_MISC_LOCAL_CTL 238 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 261 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); TI_MISC_LOCAL_CTL 270 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); TI_MISC_LOCAL_CTL 278 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); TI_MISC_LOCAL_CTL 289 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); TI_MISC_LOCAL_CTL 296 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); TI_MISC_LOCAL_CTL 298 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 300 dev/pci/if_ti.c if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN) TI_MISC_LOCAL_CTL 302 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); TI_MISC_LOCAL_CTL 1276 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K); TI_MISC_LOCAL_CTL 1158 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock pin high */\ TI_MISC_LOCAL_CTL 1159 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Set DATA bit to 1 */ \ TI_MISC_LOCAL_CTL 1160 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit to write bit */\ TI_MISC_LOCAL_CTL 1161 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA bit to 0 again */\ TI_MISC_LOCAL_CTL 1162 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */ TI_MISC_LOCAL_CTL 1169 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit */ \ TI_MISC_LOCAL_CTL 1170 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA to 0 */ \ TI_MISC_LOCAL_CTL 1171 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock high */ \ TI_MISC_LOCAL_CTL 1172 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit */ \ TI_MISC_LOCAL_CTL 1173 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Toggle DATA to 1 */ \ TI_MISC_LOCAL_CTL 1174 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit. */ \ TI_MISC_LOCAL_CTL 1175 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */