AR5K_REG_MS       210 dev/ic/ar5210.c 	hal->ah_mac_version = AR5K_REG_MS(srev, AR5K_AR5210_SREV_VER);
AR5K_REG_MS       211 dev/ic/ar5210.c 	hal->ah_mac_revision = AR5K_REG_MS(srev, AR5K_AR5210_SREV_REV);
AR5K_REG_MS      1126 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1129 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1132 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1135 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1138 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1143 dev/ic/ar5210.c 	    AR5K_REG_MS(tx_desc->tx_control_0,
AR5K_REG_MS      1319 dev/ic/ar5210.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1322 dev/ic/ar5210.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1329 dev/ic/ar5210.c 	    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1339 dev/ic/ar5210.c 		    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1362 dev/ic/ar5210.c 			    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1754 dev/ic/ar5210.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5210_TIME_OUT_ACK),
AR5K_REG_MS      1767 dev/ic/ar5210.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5210_TIME_OUT),
AR5K_REG_MS      1774 dev/ic/ar5210.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5210_TIME_OUT_CTS),
AR5K_REG_MS      1787 dev/ic/ar5210.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5210_TIME_OUT),
AR5K_REG_MS       213 dev/ic/ar5211.c 	hal->ah_mac_version = AR5K_REG_MS(srev, AR5K_AR5211_SREV_VER);
AR5K_REG_MS       214 dev/ic/ar5211.c 	hal->ah_mac_revision = AR5K_REG_MS(srev, AR5K_AR5211_SREV_REV);
AR5K_REG_MS       772 dev/ic/ar5211.c 	trigger_level = AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TXCFG),
AR5K_REG_MS      1233 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1236 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1239 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1242 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1245 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1250 dev/ic/ar5211.c 	    AR5K_REG_MS(tx_desc->tx_control_0,
AR5K_REG_MS      1419 dev/ic/ar5211.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1422 dev/ic/ar5211.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1429 dev/ic/ar5211.c 	    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1439 dev/ic/ar5211.c 		    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1458 dev/ic/ar5211.c 			    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1859 dev/ic/ar5211.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5211_TIME_OUT_ACK),
AR5K_REG_MS      1872 dev/ic/ar5211.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
AR5K_REG_MS      1879 dev/ic/ar5211.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5211_TIME_OUT_CTS),
AR5K_REG_MS      1892 dev/ic/ar5211.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
AR5K_REG_MS       210 dev/ic/ar5212.c 	hal->ah_mac_version = AR5K_REG_MS(srev, AR5K_AR5212_SREV_VER);
AR5K_REG_MS       211 dev/ic/ar5212.c 	hal->ah_mac_revision = AR5K_REG_MS(srev, AR5K_AR5212_SREV_REV);
AR5K_REG_MS       929 dev/ic/ar5212.c 	trigger_level = AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TXCFG),
AR5K_REG_MS      1434 dev/ic/ar5212.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1437 dev/ic/ar5212.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1440 dev/ic/ar5212.c 	    AR5K_REG_MS(tx_status->tx_status_0,
AR5K_REG_MS      1443 dev/ic/ar5212.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1446 dev/ic/ar5212.c 	    AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1452 dev/ic/ar5212.c 	switch (AR5K_REG_MS(tx_status->tx_status_1,
AR5K_REG_MS      1460 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_3,
AR5K_REG_MS      1463 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_2,
AR5K_REG_MS      1468 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_3,
AR5K_REG_MS      1471 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_2,
AR5K_REG_MS      1476 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_3,
AR5K_REG_MS      1479 dev/ic/ar5212.c 		    AR5K_REG_MS(tx_desc->tx_control_2,
AR5K_REG_MS      1682 dev/ic/ar5212.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1685 dev/ic/ar5212.c 	    AR5K_REG_MS(rx_status->rx_status_0,
AR5K_REG_MS      1692 dev/ic/ar5212.c 	    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1702 dev/ic/ar5212.c 		    AR5K_REG_MS(rx_status->rx_status_1,
AR5K_REG_MS      1721 dev/ic/ar5212.c 			    AR5K_REG_MS(rx_err->rx_error_1,
AR5K_REG_MS      2151 dev/ic/ar5212.c 		type = AR5K_REG_MS(data, AR5K_AR5212_PHY_PAPD_PROBE_TYPE);
AR5K_REG_MS      2194 dev/ic/ar5212.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5212_TIME_OUT_ACK),
AR5K_REG_MS      2207 dev/ic/ar5212.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TIME_OUT),
AR5K_REG_MS      2214 dev/ic/ar5212.c 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5212_TIME_OUT_CTS),
AR5K_REG_MS      2227 dev/ic/ar5212.c 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5212_TIME_OUT),