Pcic_read         884 dev/pci/pccbb.c 		Pcic_read(ph, PCIC_CSC);
Pcic_read         952 dev/pci/pccbb.c 	Pcic_read(ph, PCIC_CSC);
Pcic_read        2025 dev/pci/pccbb.c 	ioctl = Pcic_read(ph, PCIC_IOCTL);
Pcic_read        2026 dev/pci/pccbb.c 	enable = Pcic_read(ph, PCIC_ADDRWIN_ENABLE);
Pcic_read        2048 dev/pci/pccbb.c 		    Pcic_read(ph, regbase_win + PCIC_SIA_START_LOW);
Pcic_read        2050 dev/pci/pccbb.c 		    Pcic_read(ph, regbase_win + PCIC_SIA_START_HIGH);
Pcic_read        2052 dev/pci/pccbb.c 		    Pcic_read(ph, regbase_win + PCIC_SIA_STOP_LOW);
Pcic_read        2054 dev/pci/pccbb.c 		    Pcic_read(ph, regbase_win + PCIC_SIA_STOP_HIGH);
Pcic_read        2079 dev/pci/pccbb.c 	reg = Pcic_read(ph, PCIC_ADDRWIN_ENABLE);
Pcic_read        2106 dev/pci/pccbb.c 	    Pcic_read(ph, PCIC_IF_STATUS)));
Pcic_read        2109 dev/pci/pccbb.c 		if (Pcic_read(ph, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY) {
Pcic_read        2121 dev/pci/pccbb.c 	    Pcic_read(ph, PCIC_IF_STATUS));
Pcic_read        2178 dev/pci/pccbb.c 	intr = Pcic_read(ph, PCIC_INTR);
Pcic_read        2183 dev/pci/pccbb.c 	power = Pcic_read(ph, PCIC_PWRCTL);
Pcic_read        2257 dev/pci/pccbb.c 	intr = Pcic_read(ph, PCIC_INTR);
Pcic_read        2263 dev/pci/pccbb.c 	power = Pcic_read(ph, PCIC_PWRCTL);
Pcic_read        2453 dev/pci/pccbb.c 	reg = Pcic_read(ph, PCIC_ADDRWIN_ENABLE);
Pcic_read        2461 dev/pci/pccbb.c 		r1 = Pcic_read(ph, regbase_win + PCIC_SMM_START_LOW);
Pcic_read        2462 dev/pci/pccbb.c 		r2 = Pcic_read(ph, regbase_win + PCIC_SMM_START_HIGH);
Pcic_read        2463 dev/pci/pccbb.c 		r3 = Pcic_read(ph, regbase_win + PCIC_SMM_STOP_LOW);
Pcic_read        2464 dev/pci/pccbb.c 		r4 = Pcic_read(ph, regbase_win + PCIC_SMM_STOP_HIGH);
Pcic_read        2465 dev/pci/pccbb.c 		r5 = Pcic_read(ph, regbase_win + PCIC_CMA_LOW);
Pcic_read        2466 dev/pci/pccbb.c 		r6 = Pcic_read(ph, regbase_win + PCIC_CMA_HIGH);
Pcic_read        2469 dev/pci/pccbb.c 			r7 = Pcic_read(ph, 0x40 + win);
Pcic_read        2579 dev/pci/pccbb.c 	reg = Pcic_read(ph, PCIC_ADDRWIN_ENABLE);