PHY_SETBIT        330 dev/mii/ciphy.c 		PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
PHY_SETBIT        331 dev/mii/ciphy.c 		PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
PHY_SETBIT        338 dev/mii/ciphy.c 		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
PHY_SETBIT        346 dev/mii/ciphy.c 			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
PHY_SETBIT        352 dev/mii/ciphy.c 		PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
PHY_SETBIT        365 dev/mii/ciphy.c 			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
PHY_SETBIT        411 dev/mii/rgephy.c 	PHY_SETBIT(sc, 4, 0x0800);
PHY_SETBIT        437 dev/mii/rgephy.c 	PHY_SETBIT(sc, 4, 0x0800);