IDEDMA_TBL       1571 dev/pci/pciide.c 	    IDEDMA_TBL(chan), val);
IDEDMA_TBL       4398 dev/pci/pciide.c 	    sl->regs[chan].dma_iohs[IDEDMA_TBL(0)], 0, val);
IDEDMA_TBL       6540 dev/pci/pciide.c 		    &ps->regs[channel].dma_iohs[IDEDMA_TBL(0)]) != 0) {
IDEDMA_TBL       6676 dev/pci/pciide.c 	    ps->regs[channel].dma_iohs[IDEDMA_TBL(0)], 0,
IDEDMA_TBL       7396 dev/pci/pciide.c 	    (chan << 8) + SVWSATA_DMA + IDEDMA_TBL(0), val);