DTX_CONTROL 1405 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8000051500000000ULL); DELAY(50); DTX_CONTROL 1406 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80000515000000E0ULL); DELAY(50); DTX_CONTROL 1407 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80000515D93500E4ULL); DELAY(50); DTX_CONTROL 1410 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8001051500000000ULL); DELAY(50); DTX_CONTROL 1411 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80010515000000e0ULL); DELAY(50); DTX_CONTROL 1412 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80010515001e00e4ULL); DELAY(50); DTX_CONTROL 1415 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8002051500000000ULL); DELAY(50); DTX_CONTROL 1416 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80020515000000E0ULL); DELAY(50); DTX_CONTROL 1417 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80020515F21000E4ULL); DELAY(50); DTX_CONTROL 1420 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8000051500000000ULL); DELAY(50); DTX_CONTROL 1421 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80000515000000e0ULL); DELAY(50); DTX_CONTROL 1422 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80000515000000ecULL); DELAY(50); DTX_CONTROL 1424 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8001051500000000ULL); DELAY(50); DTX_CONTROL 1425 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80010515000000e0ULL); DELAY(50); DTX_CONTROL 1426 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80010515000000ecULL); DELAY(50); DTX_CONTROL 1428 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x8002051500000000ULL); DELAY(50); DTX_CONTROL 1429 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80020515000000e0ULL); DELAY(50); DTX_CONTROL 1430 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x80020515000000ecULL); DELAY(50); DTX_CONTROL 1434 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x0018040000000000ULL); DELAY(50); DTX_CONTROL 1435 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00180400000000e0ULL); DELAY(50); DTX_CONTROL 1436 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00180400000000ecULL); DELAY(50); DTX_CONTROL 1455 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x0000051500000000ULL); DELAY(50); DTX_CONTROL 1456 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00000515604000e0ULL); DELAY(50); DTX_CONTROL 1457 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00000515604000e4ULL); DELAY(50); DTX_CONTROL 1458 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00000515204000e4ULL); DELAY(50); DTX_CONTROL 1459 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, 0x00000515204000ecULL); DELAY(50); DTX_CONTROL 1463 dev/pci/if_xge.c val = PIF_RCSR(DTX_CONTROL); DTX_CONTROL 1493 dev/pci/if_xge.c PIF_WCSR(DTX_CONTROL, herc_dtx_cfg[dtx_cnt]);