bases             108 dev/ic/sti.c       bus_space_tag_t memt, bus_space_handle_t romh, bus_addr_t *bases,
bases             145 dev/ic/sti.c   	if ((rc = sti_screen_setup(scr, sc->iot, sc->memt, sc->romh, sc->bases,
bases             158 dev/ic/sti.c       bus_space_tag_t memt, bus_space_handle_t romh, bus_addr_t *bases,
bases             174 dev/ic/sti.c   	scr->bases = bases;
bases             366 dev/ic/sti.c   			*p = bases[p - cc->regions] + (r.offset << PGSHIFT);
bases             377 dev/ic/sti.c   			if (p == cc->regions && romh == bases[0])
bases            1166 dev/ic/sti.c   sti_cnattach(struct sti_screen *scr, bus_space_tag_t iot, bus_addr_t *bases,
bases            1174 dev/ic/sti.c   	if ((error = bus_space_map(iot, bases[0], PAGE_SIZE, 0, &ioh)) != 0)
bases            1184 dev/ic/sti.c   	if ((error = bus_space_map(iot, bases[0], romend, 0, &ioh)) != 0)
bases            1187 dev/ic/sti.c   	bases[0] = ioh;
bases            1188 dev/ic/sti.c   	if (sti_screen_setup(scr, iot, iot, ioh, bases, codebase) != 0)
bases              40 dev/ic/stivar.h 	bus_addr_t	*bases;
bases              97 dev/ic/stivar.h 	bus_addr_t	bases[STI_REGION_MAX];
bases             267 dev/isa/seagate.c static const char *bases[] = {
bases             272 dev/isa/seagate.c #define	nbases		(sizeof(bases) / sizeof(bases[0]))
bases              89 dev/pci/sti_pci.c 		if (sti_pci_is_console(paa, spc->sc_base.bases) != 0)
bases             312 dev/pci/sti_pci.c 		sc->bases[region] = 0;
bases             341 dev/pci/sti_pci.c 	sc->bases[region] = addr;