tmp1 306 dev/isa/ad1848.c u_char tmp, tmp1 = 0xff, tmp2 = 0xff; tmp1 340 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0xaa || tmp1 342 dev/isa/ad1848.c DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); tmp1 349 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0x45 || tmp1 351 dev/isa/ad1848.c DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); tmp1 362 dev/isa/ad1848.c if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { tmp1 363 dev/isa/ad1848.c DPRINTF(("ad_detect_D (%x)\n", tmp1)); tmp1 376 dev/isa/ad1848.c switch (tmp1 & 0x8f) { tmp1 399 dev/isa/ad1848.c DPRINTF(("ad1848: unknown codec version %#02X\n", (tmp1 & 0x8f))); tmp1 417 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { tmp1 419 dev/isa/ad1848.c DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); tmp1 431 dev/isa/ad1848.c tmp1 = ad_read(sc, SP_MISC_INFO); tmp1 432 dev/isa/ad1848.c if ((tmp1 & 0xc0) == (0x80 | MODE2)) { tmp1 452 dev/isa/ad1848.c if ((tmp1 & 0x8f) == 0x8a) { tmp1 453 dev/isa/ad1848.c tmp1 = ad_read(sc, CS_VERSION_ID); tmp1 454 dev/isa/ad1848.c switch (tmp1 & 0xe7) { tmp1 115 dev/isa/i82365_isapnp.c int tmp1, i; tmp1 139 dev/isa/i82365_isapnp.c tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA); tmp1 140 dev/isa/i82365_isapnp.c printf("(ident 0x%x", tmp1); tmp1 141 dev/isa/i82365_isapnp.c if (pcic_ident_ok(tmp1)) { tmp1 117 dev/isa/i82365_isasubr.c int i, iobuswidth, tmp1, tmp2; tmp1 147 dev/isa/i82365_isasubr.c tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA); tmp1 153 dev/isa/i82365_isasubr.c if (tmp1 == tmp2) tmp1 414 dev/pci/cs4280.c u_int32_t cci,cpi,cnt,cx,cy, tmp1; tmp1 461 dev/pci/cs4280.c for (tmp1 = 2; tmp1 <= 64; tmp1 *= 2) { tmp1 462 dev/pci/cs4280.c if (((rate / tmp1) * tmp1) != rate) tmp1 467 dev/pci/cs4280.c for (tmp1 = 5; tmp1 <= 125; tmp1 *= 5) { tmp1 468 dev/pci/cs4280.c if (((rate / tmp1) * tmp1) != rate) tmp1 473 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CSRC) & ~CSRC_MASK; tmp1 474 dev/pci/cs4280.c tmp1 |= csrc<<16; tmp1 475 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CSRC, tmp1); tmp1 487 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CCI) & ~CCI_MASK; tmp1 488 dev/pci/cs4280.c tmp1 |= cci<<16; tmp1 489 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCI, tmp1); tmp1 494 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CD) & ~CD_MASK; tmp1 495 dev/pci/cs4280.c tmp1 |= cdlay <<18; tmp1 496 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CD, tmp1); tmp1 500 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CGL) & ~CGL_MASK; tmp1 501 dev/pci/cs4280.c tmp1 |= cgl; tmp1 502 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CGL, tmp1); tmp1 506 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CGC) & ~CGC_MASK; tmp1 507 dev/pci/cs4280.c tmp1 |= cgl; tmp1 508 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CGC, tmp1);