sc_rcr            569 dev/ic/rtw.c   	u_int32_t *rcr = &sc->sc_rcr;
sc_rcr           2332 dev/ic/rtw.c   	sc->sc_rcr &= ~RTW_RCR_PKTFILTER_MASK;
sc_rcr           2333 dev/ic/rtw.c   	sc->sc_rcr &= ~(RTW_RCR_MXDMA_MASK | RTW8180_RCR_RXFTH_MASK);
sc_rcr           2335 dev/ic/rtw.c   	sc->sc_rcr |= RTW_RCR_PKTFILTER_DEFAULT;
sc_rcr           2337 dev/ic/rtw.c   	sc->sc_rcr |= RTW_RCR_ENMARP;
sc_rcr           2339 dev/ic/rtw.c   	sc->sc_rcr |= RTW_RCR_MXDMA_1024 | RTW8180_RCR_RXFTH_WHOLE;
sc_rcr           2343 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_MONITOR;
sc_rcr           2348 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_ADD3;
sc_rcr           2358 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_AB;	/* accept all broadcast */
sc_rcr           2361 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_AB;	/* accept all broadcast */
sc_rcr           2380 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_AM;
sc_rcr           2390 dev/ic/rtw.c   		sc->sc_rcr |= RTW_RCR_AM;	/* accept all multicast */
sc_rcr           2396 dev/ic/rtw.c   	RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
sc_rcr           4050 dev/ic/rtw.c   	sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
sc_rcr           4052 dev/ic/rtw.c   	if ((sc->sc_rcr & RTW_RCR_9356SEL) != 0)
sc_rcr           4077 dev/ic/rtw.c   	sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
sc_rcr            415 dev/ic/rtwvar.h 	u_int32_t		sc_rcr;		/* RTW_RCR */