sc_mem2_bt        156 dev/cardbus/if_acx_cardbus.c 	    &sc->sc_mem2_bt, &sc->sc_mem2_bh, &base, &csc->sc_mapsize2);
sc_mem2_bt        206 dev/cardbus/if_acx_cardbus.c 	Cardbus_mapreg_unmap(ct, b2, sc->sc_mem2_bt,
sc_mem2_bt        119 dev/cardbus/if_malo_cardbus.c 	    CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_mem2_bt,
sc_mem2_bt        164 dev/cardbus/if_malo_cardbus.c 	Cardbus_mapreg_unmap(ct, CARDBUS_BASE1_REG, sc->sc_mem2_bt,
sc_mem2_bt        430 dev/ic/acxreg.h 	bus_space_write_region_1((sc)->sc_mem2_bt,	\
sc_mem2_bt        436 dev/ic/acxreg.h 	bus_space_read_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        444 dev/ic/acxreg.h 	bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        447 dev/ic/acxreg.h 	bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (sc)->sc_cmd)
sc_mem2_bt         99 dev/ic/acxvar.h 	bus_space_write_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        103 dev/ic/acxvar.h 	bus_space_write_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        106 dev/ic/acxvar.h 	bus_space_write_2((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        109 dev/ic/acxvar.h 	bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        113 dev/ic/acxvar.h 	bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh,	\
sc_mem2_bt        364 dev/ic/acxvar.h 	bus_space_tag_t		sc_mem2_bt;
sc_mem2_bt        235 dev/ic/malo.c  	bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x))
sc_mem2_bt        237 dev/ic/malo.c  	bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off))
sc_mem2_bt        239 dev/ic/malo.c  	bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off))
sc_mem2_bt        242 dev/ic/malo.c  	bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t))
sc_mem2_bt         85 dev/ic/malo.h  	bus_space_tag_t		sc_mem2_bt;
sc_mem2_bt        137 dev/pci/if_acx_pci.c 	    PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_mem2_bt,
sc_mem2_bt        115 dev/pci/if_malo_pci.c 	    &sc->sc_mem2_bt, &sc->sc_mem2_bh, NULL, &psc->sc_mapsize2, 0);