sc_mem1_bt        146 dev/cardbus/if_acx_cardbus.c 	    &sc->sc_mem1_bt, &sc->sc_mem1_bh, &base, &csc->sc_mapsize1);
sc_mem1_bt        204 dev/cardbus/if_acx_cardbus.c 	Cardbus_mapreg_unmap(ct, b1, sc->sc_mem1_bt,
sc_mem1_bt        109 dev/cardbus/if_malo_cardbus.c 	    CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_mem1_bt,
sc_mem1_bt        123 dev/cardbus/if_malo_cardbus.c 		Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_mem1_bt,
sc_mem1_bt        162 dev/cardbus/if_malo_cardbus.c 	Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_mem1_bt,
sc_mem1_bt         77 dev/ic/acxvar.h 	bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh,	\
sc_mem1_bt         80 dev/ic/acxvar.h 	bus_space_read_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh,	\
sc_mem1_bt         83 dev/ic/acxvar.h 	bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh,	\
sc_mem1_bt         87 dev/ic/acxvar.h 	bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh,	\
sc_mem1_bt         90 dev/ic/acxvar.h 	bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh,	\
sc_mem1_bt        356 dev/ic/acxvar.h 	bus_space_tag_t		sc_mem1_bt;
sc_mem1_bt        223 dev/ic/malo.c  	bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc_mem1_bt        225 dev/ic/malo.c  	bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc_mem1_bt        227 dev/ic/malo.c  	bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc_mem1_bt        230 dev/ic/malo.c  	bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off))
sc_mem1_bt        232 dev/ic/malo.c  	bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off))
sc_mem1_bt       1826 dev/ic/malo.c  	bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00,
sc_mem1_bt         84 dev/ic/malo.h  	bus_space_tag_t		sc_mem1_bt;
sc_mem1_bt        129 dev/pci/if_acx_pci.c 	    PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_mem1_bt,
sc_mem1_bt        106 dev/pci/if_malo_pci.c 	    &sc->sc_mem1_bt, &sc->sc_mem1_bh, NULL, &psc->sc_mapsize1, 0);