resu             1121 dev/pci/hifn7751.c 	dma->cmdu = dma->srcu = dma->dstu = dma->resu = 0;
resu             1495 dev/pci/hifn7751.c 	    dma->cmdu, dma->srcu, dma->dstu, dma->resu,
resu             1517 dev/pci/hifn7751.c 	    (dma->resu + 1) > HIFN_D_RES_RSIZE) {
resu             1592 dev/pci/hifn7751.c 	dma->resu++;
resu             1661 dev/pci/hifn7751.c 		if (dma->resu == 0 && sc->sc_r_busy) {
resu             1689 dev/pci/hifn7751.c 	    dma->cmdu, dma->srcu, dma->dstu, dma->resu);
resu             1726 dev/pci/hifn7751.c 	if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->resu == 0)) {
resu             1738 dev/pci/hifn7751.c 	while (dma->resu != 0) {
resu             1760 dev/pci/hifn7751.c 			dma->resu--;
resu             2192 dev/pci/hifn7751.c 	i = dma->resk; u = dma->resu;
resu             2244 dev/pci/hifn7751.c 	dma->resk = i; dma->resu = u;
resu             2524 dev/pci/hifn7751.c 	    (dma->resu + 1) > HIFN_D_CMD_RSIZE)
resu             2591 dev/pci/hifn7751.c 	dma->resu++;
resu              101 dev/pci/hifn7751var.h 	volatile int		cmdu, srcu, dstu, resu;