msreg            1064 arch/i386/i386/machdep.c 	u_int64_t msreg;
msreg            1125 arch/i386/i386/machdep.c 				msreg = rdmsr(0x110B);
msreg            1126 arch/i386/i386/machdep.c 				msreg |= 0x40;
msreg            1127 arch/i386/i386/machdep.c 				wrmsr(0x110B, msreg);
msreg            1137 arch/i386/i386/machdep.c 				msreg = rdmsr(0x1107);
msreg            1138 arch/i386/i386/machdep.c 				msreg |= (0x01 << 28);
msreg            1139 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
msreg            1150 arch/i386/i386/machdep.c 				msreg = rdmsr(0x1107);
msreg            1151 arch/i386/i386/machdep.c 				msreg |= (0x01 << 28);
msreg            1152 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
msreg            1163 arch/i386/i386/machdep.c 				msreg = rdmsr(0x1107);
msreg            1164 arch/i386/i386/machdep.c 				msreg |= (0x01 << 28/**/);
msreg            1165 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
msreg            1176 arch/i386/i386/machdep.c 				msreg = rdmsr(0x1107);
msreg            1177 arch/i386/i386/machdep.c 				msreg |= (0x01 << 28/**/);
msreg            1178 arch/i386/i386/machdep.c 				wrmsr(0x1107, msreg);
msreg             114 arch/i386/i386/p4tcc.c 	uint64_t msreg, vet;
msreg             121 arch/i386/i386/p4tcc.c 	msreg = rdmsr(MSR_THERM_CONTROL);
msreg             122 arch/i386/i386/p4tcc.c 	msreg &= ~0x1e; /* bit 0 reserved */
msreg             124 arch/i386/i386/p4tcc.c 		msreg |= tcc[i].reg << 1 | 1 << 4;
msreg             125 arch/i386/i386/p4tcc.c 	wrmsr(MSR_THERM_CONTROL, msreg);
msreg             128 arch/i386/i386/p4tcc.c 	if ((vet & 0x1e) != (msreg & 0x1e))