mi_un 243 dev/pci/if_devar.h } mi_un; mi_un 246 dev/pci/if_devar.h #define mi_sia_connectivity mi_un.un_sia.sia_connectivity mi_un 247 dev/pci/if_devar.h #define mi_sia_tx_rx mi_un.un_sia.sia_tx_rx mi_un 248 dev/pci/if_devar.h #define mi_sia_general mi_un.un_sia.sia_general mi_un 249 dev/pci/if_devar.h #define mi_sia_gp_control mi_un.un_sia.sia_gp_control mi_un 250 dev/pci/if_devar.h #define mi_sia_gp_data mi_un.un_sia.sia_gp_data mi_un 252 dev/pci/if_devar.h #define mi_gpcontrol mi_un.un_gpr.gpr_gpcontrol mi_un 253 dev/pci/if_devar.h #define mi_gpdata mi_un.un_gpr.gpr_gpdata mi_un 254 dev/pci/if_devar.h #define mi_actmask mi_un.un_gpr.gpr_actmask mi_un 255 dev/pci/if_devar.h #define mi_actdata mi_un.un_gpr.gpr_actdata mi_un 256 dev/pci/if_devar.h #define mi_default mi_un.un_gpr.gpr_default mi_un 257 dev/pci/if_devar.h #define mi_cmdmode mi_un.un_gpr.gpr_cmdmode mi_un 259 dev/pci/if_devar.h #define mi_phyaddr mi_un.un_mii.mii_phyaddr mi_un 260 dev/pci/if_devar.h #define mi_gpr_length mi_un.un_mii.mii_gpr_length mi_un 261 dev/pci/if_devar.h #define mi_gpr_offset mi_un.un_mii.mii_gpr_offset mi_un 262 dev/pci/if_devar.h #define mi_reset_length mi_un.un_mii.mii_reset_length mi_un 263 dev/pci/if_devar.h #define mi_reset_offset mi_un.un_mii.mii_reset_offset mi_un 264 dev/pci/if_devar.h #define mi_capabilities mi_un.un_mii.mii_capabilities mi_un 265 dev/pci/if_devar.h #define mi_advertisement mi_un.un_mii.mii_advertisement mi_un 266 dev/pci/if_devar.h #define mi_full_duplex mi_un.un_mii.mii_full_duplex mi_un 267 dev/pci/if_devar.h #define mi_tx_threshold mi_un.un_mii.mii_tx_threshold mi_un 268 dev/pci/if_devar.h #define mi_mediamask mi_un.un_mii.mii_mediamask mi_un 269 dev/pci/if_devar.h #define mi_mii_interrupt mi_un.un_mii.mii_interrupt mi_un 270 dev/pci/if_devar.h #define mi_phyid mi_un.un_mii.mii_phyid