mhz               957 arch/i386/i386/est.c 	int i, mhz, mv, low, high;
mhz              1039 arch/i386/i386/est.c 	mhz = MSR2MHZ(cur, bus_clock);
mhz              1041 arch/i386/i386/est.c 	printf("%s: Enhanced SpeedStep %d MHz (%d mV)", cpu_device, mhz, mv);
mhz              1056 arch/i386/i386/est.c 	perflevel = (mhz - low) * 100 / (high - low);
mhz              1596 dev/ic/atw.c   	u_int mhz;
mhz              1628 dev/ic/atw.c   		mhz = 2484;
mhz              1630 dev/ic/atw.c   		mhz = 2412 + 5 * (chan - 1);
mhz              1660 dev/ic/atw.c   	gain = LSHIFT(((mhz - 374) > 2047) ? 1 : 0, SI4126_GAIN_KP2_MASK);
mhz              1683 dev/ic/atw.c   	atw_si4126_write(sc, SI4126_RF1N, mhz - 374);
mhz              1692 dev/ic/atw.c   	atw_si4126_write(sc, SI4126_RF2N, mhz - 374);
mhz               692 dev/ic/isp_openbsd.c 		int mhz, flags, period;
mhz               712 dev/ic/isp_openbsd.c 					mhz = 80;
mhz               715 dev/ic/isp_openbsd.c 					mhz = 40;
mhz               718 dev/ic/isp_openbsd.c 					mhz = 33;
mhz               721 dev/ic/isp_openbsd.c 					mhz = 25;
mhz               724 dev/ic/isp_openbsd.c 					mhz = 1000 / (period * 4);
mhz               728 dev/ic/isp_openbsd.c 				mhz = 1000 / (period * 4);
mhz               731 dev/ic/isp_openbsd.c 			mhz = 0;
mhz               747 dev/ic/isp_openbsd.c 		if (mhz) {
mhz               750 dev/ic/isp_openbsd.c 			    bus, tgt, mhz, sdp->isp_devparam[tgt].actv_offset,
mhz               159 net80211/ieee80211_regdomain.c ieee80211_regdomain2flag(u_int16_t regdomain, u_int16_t mhz)
mhz               166 net80211/ieee80211_regdomain.c 			if (mhz >= 2000 && mhz <= 3000)
mhz               169 net80211/ieee80211_regdomain.c 			if (mhz >= IEEE80211_CHANNELS_5GHZ_MIN &&
mhz               170 net80211/ieee80211_regdomain.c 			    mhz <= IEEE80211_CHANNELS_5GHZ_MAX)