mgtq              230 dev/ic/rt2661.c 	error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
mgtq              343 dev/ic/rt2661.c fail2:	rt2661_free_tx_ring(sc, &sc->mgtq);
mgtq              369 dev/ic/rt2661.c 	rt2661_free_tx_ring(sc, &sc->mgtq);
mgtq              909 dev/ic/rt2661.c 		txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
mgtq             1224 dev/ic/rt2661.c 		rt2661_tx_dma_intr(sc, &sc->mgtq);
mgtq             1457 dev/ic/rt2661.c 	desc = &sc->mgtq.desc[sc->mgtq.cur];
mgtq             1458 dev/ic/rt2661.c 	data = &sc->mgtq.data[sc->mgtq.cur];
mgtq             1526 dev/ic/rt2661.c 	bus_dmamap_sync(sc->sc_dmat, sc->mgtq.map,
mgtq             1527 dev/ic/rt2661.c 	    sc->mgtq.cur * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
mgtq             1531 dev/ic/rt2661.c 	    m0->m_pkthdr.len, sc->mgtq.cur, rate));
mgtq             1534 dev/ic/rt2661.c 	sc->mgtq.queued++;
mgtq             1535 dev/ic/rt2661.c 	sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
mgtq             1779 dev/ic/rt2661.c 			if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
mgtq             2485 dev/ic/rt2661.c 	RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
mgtq             2630 dev/ic/rt2661.c 	rt2661_reset_tx_ring(sc, &sc->mgtq);
mgtq              126 dev/ic/rt2661var.h 	struct rt2661_tx_ring		mgtq;