int_status        595 dev/isa/if_ex.c 	int int_status, send_pkts;
int_status        607 dev/isa/if_ex.c 	while ((int_status = ISA_GET(STATUS_REG)) & (Tx_Int | Rx_Int)) {
int_status        608 dev/isa/if_ex.c 		if (int_status & Rx_Int) {
int_status        612 dev/isa/if_ex.c 		} else if (int_status & Tx_Int) {
int_status       3290 dev/pci/if_san_te1.c 	unsigned char int_status = 0x00, status = 0x00;
int_status       3303 dev/pci/if_san_te1.c 		int_status = READ_REG(REG_E1_FRMR_FRM_STAT_INT_IND);
int_status       3308 dev/pci/if_san_te1.c 		    (int_status & BIT_E1_FRMR_FRM_STAT_INT_IND_OOFI)) {
int_status       3326 dev/pci/if_san_te1.c 		    (int_status & BIT_E1_FRMR_FRM_STAT_INT_IND_OOSMFI)) {
int_status       3340 dev/pci/if_san_te1.c 		    (int_status & BIT_E1_FRMR_FRM_STAT_INT_IND_OOCMFI)) {
int_status       3370 dev/pci/if_san_te1.c 		int_status = READ_REG(REG_E1_FRMR_M_A_INT_IND);
int_status       3371 dev/pci/if_san_te1.c 		if (int_status & (BIT_E1_FRMR_M_A_INT_IND_REDI |
int_status       3376 dev/pci/if_san_te1.c 			    (int_status & BIT_E1_FRMR_M_A_INT_IND_REDI)) {
int_status       3389 dev/pci/if_san_te1.c 			    (int_status & BIT_E1_FRMR_M_A_INT_IND_AISI)) {
int_status       3402 dev/pci/if_san_te1.c 			    (int_status & BIT_E1_FRMR_M_A_INT_IND_RAII)) {
int_status        838 dev/pci/if_sandrv.c sdla_read_int_stat(void *phw, u_int32_t *int_status)
int_status        849 dev/pci/if_sandrv.c 		sdla_pci_read_config_dword(hw, PCI_INT_STATUS, int_status);